A display device includes a first switching element including a second electrode and a first gate electrode, a second switching element including a third electrode connected with the first gate electrode, a third switching element including a fifth electrode connected with the second electrode, and sixth electrode, a fourth switching element including a seventh electrode connected with the second electrode, and an eighth electrode, a fifth switching element including a ninth electrode connected with the second electrode, and a tenth electrode, a first light emitting diode connected with the sixth electrode and the eighth electrode, a second light emitting diode connected with the eighth electrode and the sixth electrode, and a switch selectively connecting a common power source line with the sixth electrode or the eighth electrode. The first light emitting diode and the second light emitting diode have different polarities from each other with respect to a same direction.

Embodiments of the disclosure provide a level shift circuit, a chip and a display device. By setting first and second voltage clamping modules, and by adjusting first clamping voltage by controlling bias voltage input to the first voltage clamping module and adjusting second clamping voltage by controlling bias voltage and second bias voltage input to the second voltage clamping module, respective operating and output voltages of the first and the second voltage clamping modules and the shift module are within small range. Therefore, even the level shift circuit is designed by using devices with breakdown voltage lower than the difference between the first and second power supply voltages, the devices in the level shift circuit may be avoid being breakdown. Accordingly, some process platforms that cannot produce high-breakdown voltage devices may produce chips including the level shift circuit in the embodiment, and the restrictions on the process platform are reduced.

Provided are a display including a very-small light-emitting diode (LED) and a method of manufacturing the same. The display includes a panel in which a first signal line and a second signal line are disposed in a lattice form, an LED module including an electrode assembly having a first electrode connected to the first signal line and the second signal line and a second electrode connected to a ground, and a plurality of very-small LEDs connected to the first electrode and the second electrode, and two or more switches which connect the first signal line and the second signal line to the first electrode, wherein the second electrode is connected to a common electrode formed on the panel, at least one other LED module is grounded to the common electrode, and the two or more switches selectively provide a current supplied through the first signal line to the first electrode on the basis of a signal of the first signal line and a signal of the second signal line.

The present disclosure provides a shift register, a drive method thereof, and a gate drive circuit. The shift register includes an input circuit, a reset circuit, a first output circuit, and a second output circuit. The input circuit is configured to provide an input signal from an input terminal to a first node. The reset circuit is configured to provide a first voltage from a first voltage terminal to the first node under the control of a reset signal from a reset signal terminal. The first output circuit is configured to output from a first output terminal one of a first clock signal and a second clock signal as a first scan signal. The second output circuit is configured to output from a second output terminal the other of the first clock signal and the second clock signal as a second scan signal.

An organic light emitting display device includes a plurality of pixels. Each of the pixels includes an organic light emitting diode, first to third transistors, a storage capacitor, and a first capacitor. The second transistor includes a gate electrode receiving a first scan signal, a first electrode receiving a data signal, and a second electrode connected to a first electrode of the first transistor. The third transistor includes a gate electrode receiving a second scan signal, a first electrode connected to a second electrode of the first transistor, and a second electrode connected to a gate electrode of the first transistor. The storage capacitor includes a first electrode receiving a power voltage and a second electrode connected to the gate electrode of the first transistor. The first capacitor includes a first electrode connected to the gate electrode of the third transistor and a second electrode receiving the power voltage.

A method for driving display panel includes: for one of adjacent two frames of displayed images, when scanning odd-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in first order by a data selector; when scanning even-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in second order by the data selector; first and second orders each represents an order of inputting data signals to the data lines; first order is opposite to second order; for the other of the adjacent two frames of displayed images, when scanning odd-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in second order by the data selector; when scanning even-numbered row of sub-pixels, inputting data signals to the data lines coupled to the data selector in first order by the data selector.

An embodiment of the present invention provides a column inversion driving circuit. The column inversion driving circuit could reduce the voltage level of the logic low of the n.sup.th impulse signal, which is used to control the n.sup.th TFT matrix, through the cooperation of the voltage level of the n.sup.th impulse signal and the n.sup.th positive data signal. Furthermore, the voltage level of the logic high of the (n+1).sup.th impulse signal, which is used to control the (n+1).sup.th TFT matrix, is also reduced through the cooperation of the voltage level of the (n+1).sup.th impulse signal and the (n+1).sup.th negative data signal. This reduces the power consumption of the column inversion driving circuit.

The present disclosure provides a shift register, a drive method thereof, and a gate drive circuit. The shift register includes an input circuit, a reset circuit, a first output circuit, and a second output circuit. The input circuit is configured to provide an input signal from an input terminal to a first node. The reset circuit is configured to provide a first voltage from a first voltage terminal to the first node under the control of a reset signal from a reset signal terminal. The first output circuit is configured to output from a first output terminal one of a first clock signal and a second clock signal as a first scan signal. The second output circuit is configured to output from a second output terminal the other of the first clock signal and the second clock signal as a second scan signal.

A display driver includes: a conversion part which converts first to n-th display data pieces representing a brightness level of each pixel based on an image signal into first to n-th gradation voltages each having a voltage value corresponding to the brightness level and outputs them, where n is an integer of 2 or more; a polarity inversion signal generation circuit which generates a polarity inversion signal for prompting polarity inversion for each frame display period according to the image signal; a first external terminal which receives an operation mode signal representing a test mode or a normal mode; and a first selector which receives a test polarity inversion signal and the polarity inversion signal, selects and outputs the polarity inversion signal when the operation mode signal represents the normal mode, and selects and outputs the test polarity inversion signal when the operation mode signal represents the test mode.

A see-through window display includes a display panel having a plurality of pixels and a drive circuit that applies a voltage according to input gray scale data to the plurality of pixels, in which the display panel includes a first substrate having a pixel electrode, a second substrate, a liquid crystal layer interposed between the first substrate and the second substrate, a first polarizer provided on the first substrate having a first polarization axis, and a second polarizer provided on the second substrate having a second polarization axis, and when a transmittance of each of the pixels when the drive circuit applies a minimum voltage to the pixel is set to TW and a transmittance of each of the pixels when the drive circuit applies a maximum voltage to the pixel is set to TB, the display panel has a normally white characteristic satisfying TW>TB.