G11B2020/1843

WRITE CONFIRMATION OF A DIGITAL VIDEO RECORD CHANNEL

Systems, methods, and computer program products to perform an operation comprising receiving a first unit of video data on a first input/output (I/O) channel, of a plurality of I/O channels of a digital video recorder, computing a first value by applying an error-detecting function to the first unit of video data, attempting to write the first unit of video data to a storage location of a storage device communicably coupled to the digital video recorder, computing, after attempting to write the first unit of video data, a second value by applying the error-detecting function to a data stored at the storage location of the storage device, and upon determining that the first and second values are not equal, storing an indication that the first unit of video data was not successfully written to the storage location of the storage device.

Recording and reproducing device for reconstructing user data

A recording/reproducing device and a recording/reproducing method, which are capable of improving reliability of data while securing compatibility with a file format employed in a recording medium are provided. Provided is a reconstruction method of reproduction data acquired from a reproducing device that reproduces data from a recording medium in which the data is recorded, performs error correction using a second error correction code specified in a file format employed in the recording medium, and outputs reproduction data, and the reconstruction method of the reproduction data includes obtaining reproduction data from the reproducing device, reading a first error correction code different from the second error correction code from the reproduction data, and performing error correction on the reproduction data using the first error correction code and reconstructing user data.

Program flow monitoring for deterministic firmware functions
11277150 · 2022-03-15 · ·

The present disclosure relates to a safety system having a memory unit configured to store a series of executable instructions. In some embodiments, the executable instructions are grouped into code parts, and each code part is assigned a predefined code value. A processor is configured to execute the series of executable instructions, and to output the predefined code values respectively as the code parts are executed. A program flow monitoring (PFM) unit is configured to respectively receive the predefined code values from the processor, such that the PFM unit generates an error-checking value from the predefined code values. A verification unit is configured to compare the error-checking value to an expected return value to determine whether the series of executable instructions executed properly.

System and methods for low complexity list decoding of turbo codes and convolutional codes

A method, system, and non-transitory computer-readable recording medium of decoding a signal are provided. The method includes receiving signal to be decoded, where signal includes at least one symbol; decoding signal in stages, where each at least one symbol of signal is decoded into at least one bit per stage, wherein Log-Likelihood Ratio (LLR) and a path metric are determined for each possible path for each at least one bit at each stage; determining magnitudes of the LLRs; identifying K bits of the signal with smallest corresponding LLR magnitudes; identifying, for each of the K bits, L possible paths with largest path metrics at each decoder stage for a user-definable number of decoder stages; performing forward and backward traces, for each of the L possible paths, to determine candidate codewords; performing a Cyclic Redundancy Check (CRC) on the candidate codewords; and stopping after a first candidate codeword passes the CRC.

System and methods for low complexity list decoding of turbo codes and convolutional codes

Method for decoding signal includes receiving signal, where signal includes at least one symbol; decoding signal in stages, where each at least one symbol of signal is decoded into at least one bit per stage, wherein Log-Likelihood Ratio (LLR) for each at least one bit at each stage is determined, and identified in vector L.sub.APP; performing Cyclic Redundancy Check (CRC) on L.sub.APP, and stopping if L.sub.APP passes CRC; otherwise, determining magnitudes of LLRs in L.sub.APP; identifying K LLRs in L.sub.APP with smallest magnitudes and indexing K LLRs as r={r(1), r(2), . . . , r(K)}; setting L.sub.max to maximum magnitude of LLRs in L.sub.APP or maximum possible LLR quantization value; setting v=1; generating {tilde over (L)}.sub.A(r(k))=L.sub.A(r(k))L.sub.maxv.sub.ksign[L.sub.APP(r(k))], for k=1, 2, . . . , K; decoding with {tilde over (L)}.sub.A to identify {tilde over (L)}.sub.APP, wherein {tilde over (L)}.sub.APP is LLR vector; and performing CRC on {tilde over (L)}.sub.APP, and stopping if {tilde over (L)}.sub.APP passes CRC or v=2.sup.K-1; otherwise, incrementing v and returning to generating {tilde over (L)}.sub.A(r(k)).

PROGRAM FLOW MONITORING FOR DETERMINISTIC FIRMWARE FUNCTIONS
20200153455 · 2020-05-14 ·

The present disclosure relates to a safety system having a memory unit configured to store a series of executable instructions. In some embodiments, the executable instructions are grouped into code parts, and each code part is assigned a predefined code value. A processor is configured to execute the series of executable instructions, and to output the predefined code values respectively as the code parts are executed. A program flow monitoring (PFM) unit is configured to respectively receive the predefined code values from the processor, such that the PFM unit generates an error-checking value from the predefined code values. A verification unit is configured to compare the error-checking value to an expected return value to determine whether the series of executable instructions executed properly.

Sequential data storage with rewrite using dead-track detection

A system includes, according to one embodiment, a magnetic head having a plurality of write transducers configured to store data to tracks of a sequential access medium and a plurality of read transducers. Each read transducer is configured to read data from the sequential access medium after being written thereto by a corresponding write transducer. A first of the read transducers is aligned with a first of the write transducers, wherein the output of the first read transducer is produced during read-while-write. The system also includes a controller and logic integrated with and/or executable by the controller. The logic is configured to read, using the plurality of read transducers, encoded data from a plurality of tracks of the sequential access medium simultaneously. The logic is configured to determine that one or more tracks of the sequential access medium are dead within a sliding window and rewrite a set of encoded data from the one or more dead tracks to one or more live tracks in a rewrite area of the sequential access medium. Other systems, methods, and computer program products are described according to more embodiments.

Program flow monitoring for deterministic firmware functions
10536168 · 2020-01-14 · ·

The present disclosure relates to a safety system having a memory unit configured to store a series of executable instructions. In some embodiments, the executable instructions are grouped into code parts, and each code part is assigned a predefined code value. A processor is configured to execute the series of executable instructions, and to output the predefined code values respectively as the code parts are executed. A program flow monitoring (PFM) unit is configured to respectively receive the predefined code values from the processor, such that the PFM unit generates an error-checking value from the predefined code values. A verification unit is configured to compare the error-checking value to an expected return value to determine whether the series of executable instructions executed properly.

HEADER DECODING MECHANISM FOR TAPE STORAGE

Mechanisms are provided to receive encoded header information stored on a tape of a tape drive, wherein the encoded header information has been generated by: generating, for a plurality of tracks of the tape of the tape drive, a header information in a plurality of symbols, wherein the plurality of symbols is comprised of a first set of symbols and a second set of symbols, wherein the first set of symbols include identical information across all tracks of the plurality of tracks, and wherein the second set of symbols are configurable to include different information across all tracks of the plurality of tracks; and modifying, for writing to the tape of the tape drive, the first set of symbols of the plurality of tracks to include parity information corresponding to information included in the second set of symbols of the plurality of tracks. The received encoded header information is decoded.

HEADER ENCODING MECHANISM FOR TAPE STORAGE

Provided are a method, system, and computer program product in which mechanisms are provided to generate, for a plurality of tracks of a tape of a tape drive, a header information in a plurality of symbols, wherein the plurality of symbols is comprised of a first set of symbols and a second set of symbols, wherein the first set of symbols include identical information across all tracks of the plurality of tracks, and wherein the second set of symbols are configurable to include different information across all tracks of the plurality of track. A modification is made, for writing to the tape of the tape drive, of the first set of symbols of the plurality of tracks to include parity information corresponding to information included in the second set of symbols of the plurality of tracks.