A sintered body that includes semiconductor ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.

In one embodiment a varistor may include a ceramic body. The varistor may further comprise a multilayer coating disposed around the ceramic body. The multilayer coating may include a first layer comprising a phenolic material or a silicone material; and a second layer adjacent the first layer, the second layer comprising a high dielectric strength coating.

A method for manufacturing a multilayer varistor includes: a first step including providing a multilayer stack in which a plurality of green sheet layers, each containing a Zn oxide powder as a main component and a Pr oxide powder as a sub-component, and a plurality of internal electrode paste layers, each containing a Pd powder, are alternately stacked; and a second step including forming a sintered compact, including an internal electrode inside, by baking the multilayer stack. The second step includes: a first sub-step including baking the multilayer stack by setting an oxygen concentration in an atmosphere at 1000 ppm by volume or less while increasing a temperature from 500° C. to 800° C.; and a second sub-step including baking, after the first sub-step, the multilayer stack by setting the oxygen concentration in the atmosphere at 1000 ppm by volume or more while increasing the temperature to a maximum allowable temperature.

A sintered body that includes ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.

A sintered body that includes semiconductor ceramic layers and an internal electrode which are alternately stacked on one another is prepared. A first external electrode is formed on a side surface of the sintered body such that the first external electrode is connected to the internal electrode. An insulating layer is formed on a surface of the sintered body by applying a glass coating over an entire of the sintered body having the formed first external electrode. The insulating layer is exposed from the first external electrode. A second external electrode is formed on the first external electrode. This method provides the produced multilayer electronic component with a stable electric connection between the internal electrodes and the external electrodes.

In one embodiment a varistor may include a ceramic body. The varistor may further comprise a multilayer coating disposed around the ceramic body. The multilayer coating may include a first layer comprising a phenolic material or a silicone material; and a second layer adjacent the first layer, the second layer comprising a high dielectric strength coating.

A chip and a method for manufacturing a chip are disclosed. In an embodiment, the chip includes a varistor layer composed of zinc oxide, a multilayered electrode structure which realizes a varistor function in the varistor layer and at least two solderable or bondable external contacts on a first main surface of the varistor layer. The chip further includes a glass layer disposed on the first main surface leaving only the external contacts uncovered, wherein the glass layer includes, as main constituents, oxides of Si and/or Ge, B and K, which in total have at least 70% by weight of the constituents of the glass layer, and wherein the glass layer is substantially free of Al, Ga, Cr and Ti.

In one embodiment a varistor may include a ceramic body. The varistor may further comprise a multilayer coating disposed around the ceramic body. The multilayer coating may include an outer layer comprising an epoxy material. The multilayer coating may also include an inner layer that is adjacent the ceramic body and is disposed between the outer layer and the ceramic body. The inner layer may comprise a polymeric material that is composed of an acrylic component.

An electrode component with electrode layers formed on intermediate layers includes a ceramic substrate, two intermediate layers formed on two opposite surfaces of the ceramic substrate, two electrode layers respectively formed on the two intermediate layers, two lead wires respectively connected to the electrode layers, and an insulating layer enclosing the ceramic substrate, the intermediate layers, the electrode layers, and portions of the two lead wires. The intermediate layer formed between the ceramic substrate and the electrode layer replaces the fabrication means for conventional silver electrode layer to provide good binding strength between the ceramic substrate and the electrode layer. Besides same electrical characteristics for original products, the electrode component can get rid of the use of precious silver in screen printed silver electrode and avoid pollution caused by evaporation and thermal dissolution of organic solvent while lowering the ohmic contact resistance between the electrode layer and the ceramic substrate.

A chip and a method for manufacturing a chip are disclosed. In an embodiment, the chip includes a varistor layer composed of zinc oxide, a multilayered electrode structure which realizes a varistor function in the varistor layer and at least two solderable or bondable external contacts on a first main surface of the varistor layer. The chip further includes a glass layer disposed on the first main surface leaving only the external contacts uncovered, wherein the glass layer includes, as main constituents, oxides of Si and/or Ge, B and K, which in total have at least 70% by weight of the constituents of the glass layer, and wherein the glass layer is substantially free of Al, Ga, Cr and Ti.