Patent classifications
H01J21/105
METHOD FOR MANUFACTURING A TRENCH CHANNEL FOR A VACUUM TRANSISTOR DEVICE AND VACUUM TRANSISTOR DEVICE
A method for manufacturing a microelectronic semiconductor device comprising the steps of: forming a trench in a body, the trench having side walls, a opening, and a bottom; forming a sacrificial layer in the trench; forming a recess in the sacrificial layer; forming a restriction structure between the sacrificial layer and the opening of the trench, defining a through hole for access to the sacrificial layer; completely removing the sacrificial layer through said through hole; and depositing a metal layer over the body, thus closing the opening of the trench and forming an electron-emission cathode tip.
VACUUM ELECTRON TUBE WITH PLANAR CATHODE BASED ON NANOTUBES OR NANOWIRES
A vacuum electron tube comprises at least one electron-emitting cathode and at least one anode arranged in a vacuum chamber, the cathode having a planar structure comprising a substrate comprising a conductive material, a plurality of nanotube or nanowire elements electrically insulated from the substrate, the longitudinal axis of the nanotube or nanowire elements substantially parallel to the plane of the substrate, and at least one first connector electrically linked to at least one nanotube or nanowire element so as to be able to apply a first electrical potential to the nanowire or nanotube element.
Gate all around vacuum channel transistor
A vacuum channel transistor having a vertical gate-all-around (GAA) architecture provides high performance for high-frequency applications, and features a small footprint compared with existing planar devices. The GAA vacuum channel transistor features stacked, tapered source and drain regions that are formed by notching a doped silicon pillar using a lateral oxidation process. A temporary support structure is provided for the pillar during formation of the vacuum channel. Performance of the GAA vacuum channel transistor can be tuned by replacing air in the channel with other gases such as helium, neon, or argon. A threshold voltage of the GAA vacuum channel transistor can be adjusted by altering dopant concentrations of the silicon pillar from which the source and drain regions are formed.
Vacuum channel transistor structures with sub-10 nanometer nanogaps and layered metal electrodes
A technique relates to a semiconductor device. An emitter electrode and a collector electrode are formed in a dielectric layer such that a nanogap separates the emitter electrode and the collector electrode, a portion of the emitter electrode including layers. A channel is formed in the dielectric layer so as to traverse the nanogap. A top layer is formed over the channel so as to cover the channel and the nanogap without filling in the channel and the nanogap, thereby forming a vacuum channel transistor structure.
Emitter with deep structuring on front and rear surfaces
An emitter has a basic unit with at least one emission surface. Accordingly, the basic unit has deep structuring in a region of the at least one emission surface. More specifically, the basic unit has the deep structuring on both a front side and on a rear side in the region of the emission surface for improving emission properties.
Two-dimensional graphene cold cathode, anode, and grid
In an embodiment, a method includes forming a first diamond layer on a substrate and inducing a layer of graphene from the first diamond layer by heating the substrate and the first diamond layer. The method includes forming a second diamond layer on top of the layer of graphene and applying a mask to the second diamond layer. The mask includes a shape of a cathode, an anode, and one or more grids. The method further includes forming a two-dimensional cold cathode, a two-dimensional anode, and one or more two-dimensional grids by reactive-ion electron-beam etching. Each of the two-dimensional cold cathode, the two-dimensional anode, and the one or more two-dimensional grids includes a portion of the first diamond layer, the graphene layer, and the second diamond layer such that the graphene layer is positioned between the first diamond layer and the second diamond layer.
Nanoscale Field-Emission Device and Method of Fabrication
Nanoscale field-emission devices are presented, wherein the devices include at least a pair of electrodes separated by a gap through which field emission of electrons from one electrode to the other occurs. The gap is dimensioned such that only a low voltage is required to induce field emission. As a result, the emitted electrons energy that is below the ionization potential of the gas or gasses that reside within the gap. In some embodiments, the gap is small enough that the distance between the electrodes is shorter than the mean-free path of electrons in air at atmospheric pressure. As a result, the field-emission devices do not require a vacuum environment for operation.
FABRICATION OF VACUUM ELECTRONIC COMPONENTS WITH SELF-ALIGNED DOUBLE PATTERNING LITHOGRAPHY
The present disclosure relates to methods of fabricating electronic devices or components thereof. The electronic devices can be vacuum electronic devices. The methods can include disposing a first material on or in a substrate. The methods can further include removing a portion of the first material to form one or more structure protruding from the substrate. The methods can further include disposing a second material onto the one or more structure of the first material, and then removing a portion of the second material to form one or more sidewall structures. A second portion of the one or more structures of the first material can also be removed to form a fabricated structure including the substrate and one or more sidewall structures protruding therefrom.
Device for controlling electron flow and method for manufacturing said device
A device for controlling electron flow is provided. The device comprises a cathode, an elongate electrical conductor embedded in a diamond substrate, an anode, and a control electrode provided on the substrate surface for modifying the electric field in the region of the end of the conductor. A method of manufacturing the device is also provided.
GATE ALL AROUND VACUUM CHANNEL TRANSISTOR
A vacuum channel transistor having a vertical gate-all-around (GAA) architecture provides high performance for high-frequency applications, and features a small footprint compared with existing planar devices. The GAA vacuum channel transistor features stacked, tapered source and drain regions that are formed by notching a doped silicon pillar using a lateral oxidation process. A temporary support structure is provided for the pillar during formation of the vacuum channel. Performance of the GAA vacuum channel transistor can be tuned by replacing air in the channel with other gases such as helium, neon, or argon. A threshold voltage of the GAA vacuum channel transistor can be adjusted by altering dopant concentrations of the silicon pillar from which the source and drain regions are formed.