A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.

An electronic component includes a lead frame; a semiconductor chip arranged above the lead frame; and a connection layer sequence arranged between the lead frame and the semiconductor chip, wherein the connection layer sequence includes a first intermetallic layer including gold and indium or gold, indium and tin, a second intermetallic layer including indium and a titanium compound, indium and nickel, indium and platinum or indium and titanium, and a third intermetallic layer including indium and gold.

In a method of manufacturing a biomimetic highly stretchable conductive dry adhesive patch, a mold including a plurality of holes is provided by etching a semiconductor substrate including an insulation layer based on a footing effect. A conductive polymer composite is provided by dispersing mixed conductive fillers in a liquid elastomer. The mixed conductive fillers are formed by mixing one-dimensional conductive fillers and two-dimensional conductive fillers. The conductive polymer composite is applied on the mold such that the conductive polymer composite is injected into the plurality of holes. A conductive dry adhesive structure including a plurality of micropillars corresponding to the plurality of holes is obtained by performing a post-treatment on the conductive polymer composite applied on the mold and by removing the mold. Each of the plurality of micropillars includes a body portion and a tip portion. The tip portion has a spatula shape, is formed on the body portion, and has an area larger than that of the body portion in a plan view.

A III-nitride-based semiconductor packaged structure includes a lead frame, an adhesive layer, a III-nitride-based die, an encapsulant, and at least one bonding wire. The lead frame includes a die paddle and a lead. The die paddle has first and second recesses arranged in a top surface of the die paddle. The first recesses are located adjacent to a relatively central region of the top surface. The second recesses are located adjacent to a relatively peripheral region of the top surface. The first recess has a shape different from the second recess from a top-view perspective. The adhesive layer is disposed on the die paddle to fill into the first recesses. The III-nitride-based die is disposed on the adhesive layer. The encapsulant encapsulates the lead frame and the III-nitride-based die. The second recesses are filled with the encapsulant. The bonding wire is encapsulated by the encapsulant.

A method can include coupling a semiconductor chip and an electrode with a substrate. Bottom and top mold die can be use, where the top mold die define a first space and a second space that is separated from the first space. The method can include injecting encapsulation material to form an encapsulation member coupled to and covering at least a portion of the substrate. The encapsulation member can include a housing unit housing the electrode. The electrode can have a conductive sidewall exposed to, and not in contact with the encapsulation member, such that there is open space between the conductive sidewall of the electrode and the encapsulation member from an uppermost surface to a bottommost surface of the encapsulation member, the substrate can having a portion exposed within the open space, and the encapsulation member can have an open cross-section perpendicular to an upper surface of the substrate.

A package structure includes a second substrate. A second component is connected to the second substrate, and at least a part of the second component is connected to the second connecting rod through the second heat dissipation block, so that heat of the at least a part of the second component can be further transferred to the second connecting rod through the second heat dissipation block, and then transferred, through the second connecting rod, to the second substrate or another structure connected to the second connecting rod. In this way, the heat of the second component is transferred out, and heat conduction paths of the second component are increased.

A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.

A dual side cooling power module includes: a lower substrate including a recessed portion on at least one surface thereof, a semiconductor chip formed in the recessed portion, lead frames formed at both ends of the lower substrate, and an upper substrate formed on the semiconductor chip, a portion of the lead frames, and the lower substrate.

A method of manufacturing an interposer product that includes: forming on a same side of an interposer substrate, by a common process, first and second portions of a gold layer, wherein the first portion of the gold layer constitutes a wire-bonding pad; depositing a Au—Sn solder on the second portion of the gold layer, the Au—Sn solder comprising a gold-tin alloy having a first composition; merging the deposited Au—Sn solder with the second portion of the gold layer by performing a reflow process to form at least one bonding bump, wherein a majority of the bonding bump is made of a eutectic composition of the gold-tin alloy, and wherein the first composition has a smaller proportion of gold than is in the eutectic composition of the gold-tin alloy; and planarizing the bonding bump to form a flat bonding bump having a selected height.

A dual side cooling power module includes: a lower substrate including a recessed portion on at least one surface thereof, a semiconductor chip formed in the recessed portion, lead frames formed at both ends of the lower substrate, and an upper substrate formed on the semiconductor chip, a portion of the lead frames, and the lower substrate.