An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.

A photoresist composition and manufacturing method thereof, a manufacturing method of a metal pattern, and a manufacturing method of an array substrate are provided. The photoresist composition includes a base material and an ion adsorbent, and the ion adsorbent is chelating resin.

A peeling method at low cost with high mass productivity is provided. A silicon layer having a function of releasing hydrogen by irradiation with light is formed over a formation substrate, a first layer is formed using a photosensitive material over the silicon layer, an opening is formed in a portion of the first layer that overlaps with the silicon layer by a photolithography method and the first layer is heated to form a resin layer having an opening, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, a conductive layer is formed to overlap with the opening of the resin layer and the silicon layer, the silicon layer is irradiated with light using a laser, and the transistor and the formation substrate are separated from each other.

A crystallization method of amorphous silicon includes forming amorphous silicon on a substrate; first-irradiating a laser beam on the amorphous silicon while moving the substrate in a first direction; moving a position of the substrate in a second direction perpendicular to the first direction, and second-irradiating a laser beam on the amorphous silicon while moving the substrate in an opposite direction to the first direction.

Integrated circuits and methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit includes providing a substrate including a semiconductor layer over an insulator layer. The method includes selectively replacing portions of the semiconductor layer with insulator material to define an isolated semiconductor layer region. Further, the method includes selectively forming a relaxed layer on the isolated semiconductor layer region. Also, the method includes selectively forming a strained layer on the relaxed layer. The method forms a device over the strained layer.

An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.

A thin film transistor array panel includes a substrate, a gate line and a gate pad disposed on the substrate, a gate insulating layer disposed on the gate line and the gate pad, a data line and a data pad disposed on the gate insulating layer, an organic layer disposed on the data line and the data pad, and a connecting member disposed on one of the gate pad and the data pad, in which the organic layer includes a first portion overlapping the connecting member and a second portion not overlapping the connecting member, and a height of the first portion of the organic layer is greater than a height of the second portion of the organic layer.

A display substrate, display panel, and method of fabricating the display substrate. The display substrate includes: a first thin film transistor on a substrate; a second thin film transistor on the substrate and on the same side of the substrate as first thin film transistor; a light blocking structure between the substrate and an active region of first thin film transistor. The light blocking structure is configured to block at least a portion of light incident on the active region of first thin film transistor, such that a ratio of area of an illuminated portion of the active region of first thin film transistor to an area of the active region of first thin film transistor is less than a ratio of area of an illuminated portion of an active region of second thin film transistor to an area of the active region of second thin film transistor.

A photoresist composition and manufacturing method thereof, a manufacturing method of a metal pattern, and a manufacturing method of an array substrate are provided. The photoresist composition includes a base material and an ion adsorbent, and the ion adsorbent is chelating resin.

An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.