A semiconductor wafer of single-crystal silicon has an oxygen concentration per new ASTM of not less than 5.0×10.sup.17 atoms/cm.sup.3 and not more than 6.5×10.sup.17 atoms/cm.sup.3; a nitrogen concentration per new ASTM of not less than 1.0×10.sup.13 atoms/cm.sup.3 and not more than 1.0×10.sup.14 atoms/cm.sup.3; a front side having a silicon epitaxial layer wherein the semiconductor wafer has BMDs whose mean size is not more than 10 nm determined by transmission electron microscopy and whose mean density adjacent to the epitaxial layer is not less than 1.0×10.sup.11 cm.sup.−3, determined by reactive ion etching after having subjected the wafer covered with the epitaxial layer to a heat treatment at a temperature of 780° C. for a period of 3 h and to a heat treatment at a temperature of 600° C. for a period of 10 h.

Embodiments of the present disclosure include techniques related to techniques for processing materials for manufacture of group-III metal nitride and gallium based substrates. More specifically, embodiments of the disclosure include techniques for growing large area substrates using a combination of processing techniques. Merely by way of example, the disclosure can be applied to growing crystals of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others for manufacture of bulk or patterned substrates. Such bulk or patterned substrates can be used for a variety of applications including optoelectronic and electronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photodetectors, integrated circuits, and transistors, and others.

There is provided a Group-III element nitride semiconductor substrate including a first surface and a second surface, in which even when devices to be produced on the first surface are increased in size, variations in device characteristics between the devices in the same substrate are suppressed. A Group-III element nitride semiconductor substrate includes a first surface and a second surface. The Group-III element nitride semiconductor substrate satisfies at least one of the following items (1) to (3): (1) The main surface has a maximum height Wz of a surface waviness profile of 150 nm or less; (2) The main surface has a root mean square height Wq of the surface waviness profile of 25 nm or less; (3) The main surface has an average length WSm of surface waviness profile elements of 0.5 mm or more.

A method may include thinning a silicon wafer to a particular thickness. The particular thickness may be based on a passband frequency spectrum of an adjustable optical filter. The method may also include covering a surface of the silicon wafer with an optical coating. The optical coating may filter an optical signal and may be based on the passband frequency spectrum. The method may additionally include depositing a plurality of thermal tuning components on the coated silicon wafer. The plurality of thermal tuning components may adjust a passband frequency range of the adjustable optical filter by adjusting a temperature of the coated silicon wafer. The passband frequency range may be within the passband frequency spectrum. The method may include dividing the coated silicon wafer into a plurality of silicon wafer dies. Each silicon wafer die may include multiple thermal tuning components and may be the adjustable optical filter.

A process for manufacturing a composite structure comprises: a) providing an initial substrate made of monocrystalline silicon carbide, b) epitaxially growing a monocrystalline silicon carbide donor layer on the initial substrate to form a donor substrate 111, c) implanting ions into the donor layer to form a buried brittle plane defining the the donor layer, d) depositing, using liquid injection-chemical vapor deposition at a temperature below 1000° C., a carrier layer on the donor layer, the carrier layer comprising an at least partially amorphous SiC matrix, e) separating the donor substrate along the brittle plane to form an intermediate composite structure comprising the donor layer on the carrier layer f) heat treating the intermediate composite structure at a temperature of between 1000° C. and 1800° C. to crystallize the carrier layer and form the polycrystalline carrier substrate, and g) applying mechanical and/or chemical treatment(s) of the composite structure.

A method for forming a diamond product. Diamond material is provided and a damage layer comprising sp.sup.2 bonded carbon is formed in the material. The presence of the damage layer defines a first diamond layer above and in contact with the damage layer and a second diamond layer below and in contact with the damage layer. The damage layer is electrochemically etched to separate it from the first layer, wherein the electrochemical etching is performed in a solution containing ions, the solution having an electrical conductivity of at least 500 μS cm.sup.−1, and wherein the ions are capable of forming radicals during electrolysis. The diamond product is also described.

A method for producing a crystalline oxide semiconductor film in which, a crystalline oxide semiconductor layer and a light absorbing layer are laminated on a substrate, the light absorbing layer is irradiated with light to decompose the light absorbing layer and separate the crystalline oxide semiconductor layer and the substrate to produce a crystalline oxide semiconductor film. This provides a method for industrially advantageously producing a crystalline oxide semiconductor film, for example, a crystalline oxide semiconductor film useful for a semiconductor device (particularly a vertical element).

A free-standing substrate, for growing epitaxial crystal composed of a group 13 nitride crystal selected from gallium nitride, aluminum nitride, indium nitride or a mixed crystal thereof, includes a nitrogen polar surface and group 13 element polar surface. The nitrogen polar surface is warped in a convex shape, and a chamfer part is provided in an outer peripheral part of the nitrogen polar surface.

A semiconductor device has a substrate. The substrate can be multiple layers. A first semiconductor layer made of a first semiconductor material is disposed over the substrate. The first semiconductor material can be substantially defect-free silicon carbide. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third layer can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET or diode. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.

A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The first semiconductor material is substantially defect-free silicon carbide, and the second semiconductor material is silicon. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET, diode, insulated gate bipolar transistor, cluster trench insulated gate bipolar transistor, and thyristor. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.