In some examples, a device comprises a wafer chuck, a member having a surface facing the wafer chuck, a blade supported by the surface, a first vacuum nozzle extending through the member and having a first vacuum orifice facing a same direction as the surface, and a second vacuum nozzle extending through the member and having a second vacuum orifice facing the same direction as the surface. The first and second vacuum orifices are on opposing sides of the blade.

A method of producing a silicon wafer includes: a laser mark printing step of printing a laser mark having a plurality of dots on a silicon wafer; an etching step of performing etching on at least a laser-mark printed region in a surface of the silicon wafer; and a polishing step of performing polishing on both surfaces of the silicon wafer having been subjected to the etching step. In the laser mark printing step, each of the plurality of dots is formed by a first step of irradiating a predetermined position on a periphery of the silicon wafer with laser light of a first beam diameter thereby forming a first portion of the dot and a second step of irradiating the predetermined position with laser light of a second beam diameter that is smaller than the first beam diameter thereby forming a second portion of the dot.

A semiconductor silicon wafer manufacturing method is provided, where P aggregate defects and SF in an epitaxial layer can be suppressed. A silicon wafer substrate cut from a monocrystal ingot is doped with phosphorus and has a resistivity of 1.05 mΩ.Math.cm or less and a concentration of solid-solution oxygen of 0.9×10.sup.18 atoms/cm.sup.3. The method includes steps of mirror-polishing substrates and heat treatment, where after the mirror-polishing step, the substrate is kept at a temperature from 700° C. to 850° for 30 to 120 minutes, then after the temperature rise, kept at a temperature from 100° C. to 1250° for 30 to 120 minutes, and after cooling, kept at a temperature from 700° C. to 450° C. for less than 10 minutes as an experience time. The heat treatment step is performed in a mixture gas of hydrogen and argon. The method includes an epitaxial layer deposition step to a thickness of 1.3 μm to 10.0 μm.

A method and system for forming material within a gap on a surface of a substrate using metal material are disclosed. An exemplary method includes forming a layer of meltable material overlying the substrate and heating the meltable material to a flow temperature to form molten material that flows within the gap.

A method and system for forming material within a gap on a surface of a substrate are disclosed. An exemplary method includes depositing a soluble layer on a surface of the substrate and exposing the soluble layer to a solvent to thereby form solvated material within the gap. Exemplary methods can further include drying the solvated material and/or converting the solvated or dried material to another material.

Provided is an indium phosphide substrate, a semiconductor epitaxial wafer, and a method for producing an indium phosphide substrate, which can satisfactorily suppress warpage of the back surface of the substrate. The indium phosphide substrate includes a main surface for forming an epitaxial crystal layer and a back surface opposite to the main surface, wherein the back surface has a SORI value of 2.5 μm or less, as measured with the back surface of the indium phosphide substrate facing upward.

In a silicon carbide wafer in an embodiment, in the photoluminescence signal intensity spectrum obtained after irradiating a laser on one surface of the silicon carbide wafer, the number of peak signals having an intensity more than 1.2 times the average signal intensity of the spectrum is 1/cm.sup.2 or less.

Disclosed are a silicon carbide wafer and a method of manufacturing the same. The silicon carbide wafer includes an upper surface and a lower surface, the upper surface includes a first target region, the first target region being within 85% of a radius of the upper surface based on a center of the upper surface, a first peak omega angle measured at intervals of 15 mm in a first direction in the first target region is within −1° to +1° based on a peak omega angle measured at the center of the upper surface, and the first direction is a [1-100] direction and a direction passing through the center of the upper surface.

A silicon carbide semiconductor device includes a silicon carbide semiconductor layer and a side silicide layer. The silicon carbide semiconductor layer includes a silicon carbide single crystal and has a main surface, a rear surface opposite to the main surface, and a side surface connecting the main surface and the rear surface and formed by a cleavage plane. The silicon carbide semiconductor layer further includes a modified layer. The modified layer forms a part of the side surface located close to the rear surface and has an atomic arrangement structure of silicon carbide different from an atomic arrangement structure of the silicon carbide single crystal. The side silicide layer includes a metal silicide that is a compound of a metal element and silicon. The side silicide layer is disposed on the side surface of the silicon carbide semiconductor layer and is adjacent to the modified layer.

An indium phosphide substrate, a method of inspecting thereof and a method of producing thereof are provided, by which an epitaxial film grown on the substrate is rendered excellently uniform, thereby allowing improvement in PL characteristics and electrical characteristics of an epitaxial wafer formed using this epitaxial film. The indium phosphide substrate has a first main surface and a second main surface, a surface roughness Ra1 at a center position on the first main surface, and surface roughnesses Ra2, Ra3, Ra4, and Ra5 at four positions arranged equidistantly along an outer edge of the first main surface and located at a distance of 5 mm inwardly from the outer edge. An average value m1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.5 nm or less, and a standard deviation σ1 of the surface roughnesses Ra1, Ra2, Ra3, Ra4, and Ra5 is 0.2 nm or less.