A high quality silicon carbide epitaxial wafer using a p-type silicon carbide single crystal substrate of low resistivity. The silicon carbide epitaxial wafer includes a p-type 4HSiC single crystal substrate that has a first main surface having an off angle with respect to (0001) plane, and has a resistivity of less than 0.4 cm, and a silicon carbide epitaxial layer that is disposed on the first main surface of the p-type 4HSiC single crystal substrate, in which an off direction of the off angle is the <01-10> direction.

To provide a silicon epitaxial wafer production method and a silicon epitaxial wafer in which the DIC defects can be suppressed, a silicon epitaxial wafer production method is provided, in which an epitaxial layer is grown in a vapor phase on a principal plane of a silicon single crystal wafer. The principal plane is a {110} plane or a plane having an off-angle of less than 1 degree from the {110} plane. The silicon epitaxial wafer production method includes setting a temperature of the silicon single crystal wafer to 1100? C. to 1135? C. and growing the epitaxial layer in the vapor phase at a growth rate of 2.0 ?m/min to 3.0 ?m/min.

A GaN substrate that comprises a GaN single crystal having a Ga face and a N face on surfaces thereof, wherein the Ga face includes: a flat face portion; and a curved face portion that surrounds a circumference of the flat face portion, and wherein an off-angle distribution of the N face is larger than an off-angle distribution of the Ga face.

A shaped crystalline ingot for an ion cleaving process has a major surface that is substantially planar, a first side face that is substantially planar along a first direction orthogonal to the major surface, and a second side face that is substantially planar along a second direction orthogonal to the major surface. The ion cleaving process is a process in which ions are implanted into the shaped crystalline ingot to form a cleave plane that separates a substrate comprising the major surface from the shaped crystalline ingot.

A method for slicing a crystalline material ingot includes providing a crystalline material boule characterized by a cropped structure including a first end-face, a second end-face, and a length along an axis in a first crystallographic direction extending from the first end-face to the second end-face. The method also includes cutting the crystalline material boule substantially through a first crystallographic plane in parallel to the axis to separate the crystalline material boule into a first portion with a first surface and a second portion with a second surface. The first surface and the second surface are planar surfaces substantially along the first crystallographic plane. The method further includes exposing either the first surface of the first portion or the second surface of the second portion, and performing a layer transfer process to form a crystalline material sheet from either the first surface of the first portion or from the second surface of the second portion.

A method for producing a composite structure comprises providing a donor substrate including a single-crystal material, and a support substrate having a first alignment pattern on a face or edge of the support substrate. A heat treatment is applied at least to the donor substrate to bring about a surface reorganization on at least one face of the donor substrate. The surface reorganization results in formation of first steps of nanometric amplitude, which are parallel to a first main axis. The donor substrate and the support substrate are optically aligned, to better than ?0.1? between a locating mark indicating the first main axis on the donor substrate and at least one alignment pattern of the support substrate. The donor substrate and the support substrate are then assembled together, and a thin layer is transferred from the donor substrate onto the support substrate.

A method of manufacturing a gallium nitride substrate, the method including forming a first buffer layer on a silicon substrate such that the first buffer layer has one or more holes therein; forming a second buffer layer on the first buffer layer such that the second buffer layer has one or more holes therein; and forming a GaN layer on the second buffer layer, wherein the one or more holes of the first buffer layer are filled by the second buffer layer.

A semiconductor device according to the present disclosure includes a substrate including a plurality of atomic steps that propagate along a first direction, and a transistor disposed on the substrate. The transistor includes a channel member extending a second direction perpendicular to the first direction, and a gate structure wrapping around the channel member.

A method of making a semiconductor including a step of preparing a base substrate; a first step of epitaxially growing a single crystal of a group III nitride semiconductor having a top surface with (0001) plane exposed, directly on the main surface of the base substrate, forming a plurality of concaves composed of inclined interfaces other than the (0001) plane on the top surface, gradually expanding the inclined interfaces toward an upper side of the main surface of the base substrate, making the (0001) plane disappear from the top surface, and growing a first layer whose surface is composed only of the inclined interfaces; and a second step of epitaxially growing a single crystal of a group III nitride semiconductor on the first layer, making the inclined interfaces disappear, and growing a second layer having a mirror surface, and a semiconductor made thereby.

A method for manufacturing a semiconductor device includes a step of preparing a SiC substrate, a step of fixing the SiC substrate on an electrostatic chuck and heat-treating the SiC substrate, and a step of performing ion implantation treatment on the SiC substrate fixed on the electrostatic chuck and heat-treated. The step of heat-treating includes an outer circumferential-side chucking step which generates an electrostatic attraction force between an outer circumferential region of the SiC substrate and an outer circumferential portion of the electrostatic chuck, the outer circumferential portion facing the outer circumferential region, and an inner circumferential-side chucking step which is started after the outer circumferential-side chucking step is started, and generates an electrostatic attraction force between an inner circumferential region of the SiC substrate and an inner circumferential portion of the electrostatic chuck, the inner circumferential portion facing the inner circumferential region.