Semiconductor devices and manufacturing method of the same are disclosed. A semiconductor device includes a substrate, a p-type MOS transistor, an n-type MOS transistor and a cured flowable oxide layer. The substrate includes a first region and a second region. The p-type MOS transistor is in the first region. The n-type MOS transistor is in the second region. The cured flowable oxide layer covers the p-type MOS transistor and the n-type MOS transistor, wherein a first strain of the cured flowable oxide layer applying to the p-type MOS transistor is different from a second strain of the cured flowable oxide layer applying to the n-type MOS transistor, and the difference therebetween is greater than 0.002 Gpa.

A method for forming a nanogap includes forming a knockoff feature on a dielectric layer and forming a trench in the dielectric layer on opposite sides of the knockoff feature. A noble metal is deposited in the trenches and over the knockoff feature. A top surface is polished to level the noble metal in the trenches with a top of the dielectric layer to form electrodes in the trenches and to remove the noble metal from the knockoff feature. A nanochannel is etched into the dielectric layer such that the knockoff feature is positioned within the nanochannel. The knockoff feature is removed to form a nanogap between the electrodes.

A method for planarizing a substrate includes: receiving a substrate having microfabricated structures that differ in height across the working surface of the substrate that define a non-planar topography, depositing a first layer that includes a solubility-shifting agent on the working surface of the substrate by spin-on deposition in a non-planar fashion, exposing the first layer to a first pattern of actinic radiation based on the topography, developing the first layer using a predetermined solvent, and depositing a second layer over the working surface of the substrate that has a greater planarity as compared to the first layer prior to developing the first layer. The first pattern of radiation changes a solubility of the first layer such that upper regions of the non-planar topography of the first layer are soluble to the predetermined solvent.

A method for planarizing a substrate includes: receiving a substrate having microfabricated structures that differ in height across the working surface of the substrate that define a non-planar topography, depositing a first layer that includes a solubility-shifting agent on the working surface of the substrate by spin-on deposition in a non-planar fashion, exposing the first layer to a first pattern of actinic radiation based on the topography, developing the first layer using a predetermined solvent, and depositing a second layer over the working surface of the substrate that has a greater planarity as compared to the first layer prior to developing the first layer. The first pattern of radiation changes a solubility of the first layer such that upper regions of the non-planar topography of the first layer are soluble to the predetermined solvent.

A silicone resin is disclosed. The silicone resin is free from carbon atoms. A method of preparing the resin is additionally disclosed. This method comprises reacting a silane compound and a precursor compound, thereby preparing the silicone resin. A composition including the silicon resin and a vehicle is further disclosed. A method of preparing a film with the composition is also disclosed. This method comprises applying the composition including the silicone resin and the vehicle to a substrate to form a layer. This method also includes heating the layer to give the film.

A method of forming aligned gates for horizontal nanowires or nanosheets, comprising: providing a wafer which comprises at least one fin of sacrificial layers alternated with functional layers, and a dummy gate covering a section of the fin between a first end and a second end; at least partly removing the sacrificial layers at the first end and the second end thereby forming a void between the functional layers at the first and end such that the void is partly covered by the dummy gate; providing resist material which oxidizes upon EUV exposure; exposing the wafer to EUV light; selectively removing the dummy gate and the unexposed resist; forming a gate between the functional layers and between the exposed resist at the first end and at the second end.

A silicone resin is disclosed. The silicone resin is free from carbon atoms. A method of preparing the resin is additionally disclosed. This method comprises reacting a silane compound and a precursor compound, thereby preparing the silicone resin. A composition including the silicon resin and a vehicle is further disclosed. A method of preparing a film with the composition is also disclosed. This method comprises applying the composition including the silicone resin and the vehicle to a substrate to form a layer. This method also includes heating the layer to give the film.

A method of forming aligned gates for horizontal nanowires or nanosheets, comprising: providing a wafer which comprises at least one fin of sacrificial layers alternated with functional layers, and a dummy gate covering a section of the fin between a first end and a second end; at least partly removing the sacrificial layers at the first end and the second end thereby forming a void between the functional layers at the first and end such that the void is partly covered by the dummy gate; providing resist material which oxidizes upon EUV exposure; exposing the wafer to EUV light; selectively removing the dummy gate and the unexposed resist; forming a gate between the functional layers and between the exposed resist at the first end and at the second end.

A method for forming a nanogap includes forming a knockoff feature on a dielectric layer and forming a trench in the dielectric layer on opposite sides of the knockoff feature. A noble metal is deposited in the trenches and over the knockoff feature. A top surface is polished to level the noble metal in the trenches with a top of the dielectric layer to form electrodes in the trenches and to remove the noble metal from the knockoff feature. A nanochannel is etched into the dielectric layer such that the knockoff feature is positioned within the nanochannel. The knockoff feature is removed to form a nanogap between the electrodes.

A method for forming a nanogap includes forming a knockoff feature on a dielectric layer and forming a trench in the dielectric layer on opposite sides of the knockoff feature. A noble metal is deposited in the trenches and over the knockoff feature. A top surface is polished to level the noble metal in the trenches with a top of the dielectric layer to form electrodes in the trenches and to remove the noble metal from the knockoff feature. A nanochannel is etched into the dielectric layer such that the knockoff feature is positioned within the nanochannel. The knockoff feature is removed to form a nanogap between the electrodes.