A method for manufacturing a semiconductor device of an embodiment includes: forming a first film on a semiconductor layer containing silicon (Si), the first film containing a metal element and oxygen (O) and having a first thickness; and forming a second film between the semiconductor layer and the first film using radical oxidation, the second film containing silicon (Si) and oxygen (O) and having a second thickness larger than the first thickness.

A semiconductor device with different configurations of gate structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a gate opening on the fin structure, forming an interfacial oxide layer on the fin structure, forming a first dielectric layer over the interfacial oxide layer, forming a dipole layer between the interfacial oxide layer and the first dielectric layer, forming a second dielectric layer on the first dielectric layer, forming a work function metal (WFM) layer on the second dielectric layer, and forming a gate metal fill layer on the WFM layer. The dipole layer includes ions of first and second metals that are different from each other. The first and second metals have electronegativity values greater than an electronegativity value of a metal or a semiconductor of the first dielectric layer.

A film formation method includes (A) to (C) below. (A) Providing a substrate including, on a surface of the substrate, a first region in which a first material is exposed and a second region in which a second material different from the first material is exposed. (B) Supplying, to the surface of the substrate, vapor of a solution that contains a raw material of a self-assembled monolayer and a solvent by which the raw material is dissolved, and selectively forming a self-assembled monolayer in the first region. (C) Forming a desired target film in the second region by using the self-assembled monolayer formed in the first region.

A semiconductor device includes a substrate, a pair of semiconductor fins, a dummy fin structure, a gate structure, a plurality of source/drain structures, a crystalline hard mask layer, and an amorphous hard mask layer. The pair of semiconductor fins extend upwardly from the substrate. The dummy fin structure extends upwardly above the substrate and is laterally between the pair of semiconductor fins. The gate structure extends across the pair of semiconductor fins and the dummy fin structure. The source/drain structures are above the pair of semiconductor fins and on either side of the gate structure. The crystalline hard mask layer extends upwardly from the dummy fin and has an U-shaped cross section. The amorphous hard mask layer is in the first hard mask layer, wherein the amorphous hard mask layer having an U-shaped cross section conformal to the U-shaped cross section of the crystalline hard mask layer.

A film formation method includes: preparing a substrate including, on its surface, a first region in which a first material is exposed and a second region in which a second material different from the first material is exposed; selectively forming a self-assembled monolayer in the first region, among the first region and the second region; and forming a desired target film in the second region, among the first region and the second region, by using the self-assembled monolayer formed in the first region, wherein the selectively forming the self-assembled monolayer includes: selectively forming the self-assembled monolayer in the first region by using a first processing liquid including a first raw material of the self-assembled monolayer; and modifying the self-assembled monolayer, by using a second processing liquid including a second raw material of the self-assembled monolayer at a concentration different from a concentration of the first processing liquid.

Exemplary integrated cluster tools may include a factory interface including a first transfer robot. The tools may include a wet clean system coupled with the factory interface at a first side of the wet clean system. The tools may include a load lock chamber coupled with the wet clean system at a second side of the wet clean system opposite the first side of the wet clean system. The tools may include a first transfer chamber coupled with the load lock chamber. The first transfer chamber may include a second transfer robot. The tools may include a thermal treatment chamber coupled with the first transfer chamber. The tools may include a second transfer chamber coupled with the first transfer chamber. The second transfer chamber may include a third transfer robot. The tools may include a metal deposition chamber coupled with the second transfer chamber.

A nano-crystalline high-k film and methods of forming the same in a semiconductor device are disclosed herein. The nano-crystalline high-k film may be initially deposited as an amorphous matrix layer of dielectric material and self-contained nano-crystallite regions may be formed within and suspended in the amorphous matrix layer. As such, the amorphous matrix layer material separates the self-contained nano-crystallite regions from one another preventing grain boundaries from forming as leakage and/or oxidant paths within the dielectric layer. Dopants may be implanted in the dielectric material and crystal phase of the self-contained nano-crystallite regions maybe modified to change one or more of the permittivity of the high-k dielectric material and/or a ferroelectric property of the dielectric material.

A method is provided for selective film deposition on a substrate. According to one embodiment, the method includes providing a substrate containing a first material having a first surface and second material having a second surface, where the first material includes a dielectric material and the second material contains a semiconductor material or a metal-containing material that excludes a metal oxide, reacting the first surface with a reactant gas containing a hydrophobic functional group to form a hydrophobic first surface, and depositing, by gas phase deposition, a metal oxide film on the second surface, where deposition of the metal oxide film is hindered on the hydrophobic first surface.

An object is to shorten the time for rewriting data in memory cells. A memory module includes a first memory cell, a second memory cell, a selection transistor, and a wiring WBL1. The first memory cell includes a first memory node. The second memory cell includes a second memory node. One end of the first memory cell is electrically connected to the wiring WBL1 through the selection transistor. The other end of the first memory cell is electrically connected to one end of the second memory cell. The other end of the second memory cell is electrically connected to the wiring WBL1. When the selection transistor is on, data in the first memory node is rewritten by a signal supplied through the selection transistor to the wiring WBL1. When the selection transistor is off, data in the first memory node is rewritten by a signal supplied through the second memory node to the wiring WBL1.

Methods and apparatuses for performing spacer on spacer multiple patterning schemes using an exhumable first spacer material and a complementary second spacer material. Certain embodiments involve using a tin oxide spacer material for one of the spacer materials in spacer on spacer self aligned multiple patterning.