H01L21/02186

ALLOY FILM ETCH
20230047486 · 2023-02-16 ·

A method for forming etched features in a layer of a first material is provided. A layer of a second material is deposited over the layer of the first material. An alloy layer of the first material and the second material is formed between the layer of the first material and the layer of the second material. The layer of the first material is selectively etched with respect to the alloy layer, using the alloy layer as a hardmask.

RRAM Materials and Devices
20230048493 · 2023-02-16 ·

Methods for the manufacture of stable strontium titanate nanocube sols are disclosed. The sols are useful in the manufacture of switchable layers suitable for RRAM applications and the switching performance is stable and reproducible. The RRAM layers comprise a mixture of strontium titanate nanocubes and surfactant.

METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20230048781 · 2023-02-16 · ·

A method for manufacturing a semiconductor device of an embodiment includes: forming a first film on a semiconductor layer containing silicon (Si), the first film containing a metal element and oxygen (O) and having a first thickness; and forming a second film between the semiconductor layer and the first film using radical oxidation, the second film containing silicon (Si) and oxygen (O) and having a second thickness larger than the first thickness.

Film-forming apparatus and film-forming method
11578407 · 2023-02-14 · ·

A film-forming apparatus for forming a predetermined film on a substrate by plasma ALD includes a chamber, a stage, a shower head having an upper electrode and a shower plate insulated from the upper electrode, a first high-frequency power supply connected to the upper electrode, and a second high-frequency power supply connected to an electrode contained in the stage. A high-frequency power is supplied from the first high-frequency power supply to the upper electrode, thereby forming a high-frequency electric field between the upper electrode and the shower plate and generating a first capacitively coupled plasma. A high-frequency power is supplied from the second high-frequency power supply to the electrode, thereby forming a high-frequency electric field between the shower plate and the electrode in the stage and generating a second capacitively coupled plasma that is independent from the first capacitively coupled plasma.

Dielectric powder and multilayer capacitor using the same

A dielectric powder includes a core-shell structure including a core region formed in an inner portion thereof and a shell region covering the core region. The core region includes barium titanate (BaTiO.sub.3) doped with a metal oxide, and the shell region is formed of a ferroelectric material.

Lithography Using High Selectivity Spacers for Pitch Reduction

A method embodiment for patterning a semiconductor device includes patterning a dummy layer over a hard mask to form one or more dummy lines. A sidewall aligned spacer is conformably formed over the one or more dummy lines and the hard mask. A first reverse material layer is formed over the sidewall aligned spacer. A first photoresist is formed and patterned over the first reverse material layer. The first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched. The one or more dummy lines are removed, and the hard mask is patterned using the sidewall aligned spacer and the first reverse material layer as a mask. A material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer.

ADVANCED SELF ALIGNED MULTIPLE PATTERNING USING TIN OXIDE
20230238238 · 2023-07-27 ·

Methods and apparatuses for performing spacer on spacer multiple patterning schemes using an exhumable first spacer material and a complementary second spacer material. Certain embodiments involve using a tin oxide spacer material for one of the spacer materials in spacer on spacer self aligned multiple patterning.

PEALD Nitride Films

A method of depositing nitride films is disclosed. Some embodiments of the disclosure provide a PEALD process for depositing nitride films which utilizes separate reaction and nitridation plasmas. In some embodiments, the nitride films have improved growth per cycle (GPC) relative to films deposited by thermal processes or plasma processes with only a single plasma exposure. In some embodiments, the nitride films have improved film quality relative to films deposited by thermal processes or plasma processes with only a single plasma exposure.

Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium

There is provided a technique that includes filling a concave portion formed on a surface of a substrate with a first film and a second film by performing: (a) forming the first film having a hollow portion using a first precursor so as to fill the concave portion formed on the surface of the substrate; (b) etching a portion of the first film which makes contact with the hollow portion, using an etching agent; and (c) forming the second film on the first film of which the portion is etched, using a second precursor, wherein (b) includes performing, a predetermined number of times: (b-1) modifying a portion of the first film using a modifying agent; and (b-2) selectively etching the modified portion of the first film using the etching agent.

BARIUM TITANATE FILMS HAVING REDUCED INTERFACIAL STRAIN

In some embodiments method comprises depositing a ferroelectric layer on a top surface of a semiconductor wafer and forming one or more gaps in the ferroelectric layer. The one or more gaps can be formed on a repetitive spacing to relieve stresses between the ferroelectric layer and the semiconductor wafer. A first dielectric layer is deposited over the ferroelectric layer and the first dielectric layer is planarized to fill in the gaps. A second dielectric layer is formed between the ferroelectric layer and the semiconductor wafer. The second dielectric layer can be formed by annealing the wafer in an oxidizing atmosphere such that an upper portion of the semiconductor substrate forms an oxide layer between the semiconductor substrate and the ferroelectric layer.