Described herein is a technique capable of suppressing a deviation in a thickness of a film formed on a substrate. According to one aspect of the technique of the present disclosure, a substrate processing apparatus includes a substrate retainer capable of supporting substrates; a cylindrical process chamber including a discharge part and supply holes; partition parts arranged in the circumferential direction to partition supply chambers communicating with the process chamber through the supply holes; nozzles provided with an ejection hole; and gas supply pipes. The supply chambers includes a first nozzle chamber and a second nozzle chamber, the process gas includes a source gas and an assist gas, the nozzles includes a first nozzle for the assist gas flows and a second nozzle disposed in the second nozzle chamber and through which the source gas flows, and the first nozzle is disposed adjacent to the second nozzle.

The present disclosure provides a DNA-targeting RNA that comprises a targeting sequence and, together with a modifying polypeptide, provides for site-specific modification of a target DNA and/or a polypeptide associated with the target DNA. The present disclosure further provides site-specific modifying polypeptides. The present disclosure further provides methods of site-specific modification of a target DNA and/or a polypeptide associated with the target DNA The present disclosure provides methods of modulating transcription of a target nucleic acid in a target cell, generally involving contacting the target nucleic acid with an enzymatically inactive Cas9 polypeptide and a DNA-targeting RNA. Kits and compositions for carrying out the methods are also provided. The present disclosure provides genetically modified cells that produce Cas9; and Cas9 transgenic non-human multicellular organisms.

A method for manufacturing a semiconductor structure includes etching trenches in a semiconductor substrate to form a semiconductor fin between the trenches; converting sidewalls of the semiconductor fin into hydrogen-terminated surfaces each having silicon-to-hydrogen (S—H) bonds; after converting the sidewalls of the semiconductor fin into the hydrogen-terminated surfaces, depositing a dielectric material overfilling the trenches; and etching back the dielectric material to fall below a top surface of the semiconductor fin.

There is provided a method of processing an oxygen-containing workpiece. The method of processing an oxygen-containing workpiece includes controlling a fluorine concentration in the oxygen-containing workpiece based on at least one of a kind of a fluorine-containing processing gas, a processing temperature and a processing pressure used for processing the oxygen-containing workpiece.

A substrate processing method is provided. In the method, a substrate is provided. A monomer that is chemically bonded to the substrate is supplied onto the substrate. An initiator for polymerizing the monomer is supplied to the substrate having the supplied monomer thereon, thereby forming a polymer film.

Methods of selectively depositing blocking layers on conductive surfaces over dielectric surfaces are described. In some embodiments, a carboxylic acid is exposed to a substrate to selectively form a blocking layer. In some embodiments, a hydrazide is exposed to a substrate to selectively form a blocking layer. In some embodiments, an alkyl phosphonic acid is exposed to a substrate to selectively form a blocking layer. In some embodiments, the alkyl phosphonic acid is formed in-situ and exposed to the substrate. In some embodiments, a layer is selectively deposited on the dielectric surface after the blocking layer is formed.

There is provided a technique that includes: (a) arranging a plurality of first substrates and a second substrate having a smaller surface area than the first substrates and accommodating the plurality of first substrates and the second substrate in a process chamber; and (b) forming a thin film on each of the plurality of first substrates by supplying a processing gas to a substrate arrangement region in which the plurality of first substrates and the second substrate are arranged, wherein (b) includes: (c) supplying a dilution gas to a first supply region of the substrate arrangement region, or not performing a supply of the dilution gas to the first supply region, and supplying the dilution gas to at least one second supply region of the substrate arrangement region at a flow rate larger than a flow rate of the dilution gas supplied to the first supply region.

An embodiment of the present disclosure provides a method of manufacturing a semiconductor structure. The method includes: providing a base; and forming a silicon nitride film layer on the base by an atomic layer deposition process, where the atomic layer deposition process includes multiple cyclic deposition steps; in each of the cyclic deposition steps, a silicon source gas and a nitrogen source gas are provided to a surface of the base; before each of the cyclic deposition steps, the method of manufacturing a semiconductor structure further includes a repair step; in the repair step, a repair gas is provided to the surface of the base, and the repair gas is a hydrogen-containing repair gas; the repair gas includes a polar molecule for repairing the surface of the base that is damaged.

Processes for surface treatment of a workpiece are provided. In one example implementation, a method can include placing the workpiece on a workpiece support in a processing chamber. The method can include admitting a process gas into the processing chamber. The process gas can include an ozone gas. The method can include exposing the silicon nitride layer and the low-k dielectric layer to the process gas to modify a surface wetting angle of the silicon nitride layer.

Methods and devices for forming a conductive line disposed over a substrate. A first dielectric layer is disposed over the substrate and coplanar with the conductive line. A second dielectric layer disposed over the conductive line and a third dielectric layer disposed over the first dielectric layer. A via extends through the second dielectric layer and is coupled to the conductive line. The second dielectric layer and the third dielectric layer are coplanar and the second and third dielectric layers have a different composition. In some embodiments, the second dielectric layer is selectively deposited on the conductive line.