A process of making sensors and sensor arrays that has the ability to manipulate of the morphology or flow of an applied drop or sample over the sensor array surface at any point in the patterning process and sensors and sensor arrays having increased sensitivity and limits of detection. In addition, said process can provided real time notification of any centerline deviation. Such production process can be adjusted in real time. Thus, large numbers of units can be made—even in millions of per day—with few if any out of specification units being produced. Such process does not require large-scale clean rooms and is easily configurable.

A display apparatus and a method of manufacturing the same are provided. According to an embodiment, a display apparatus includes: a substrate; a thin-film transistor located on the substrate; and a buffer layer, a conductive layer, and an insulating layer sequentially located from the substrate between the substrate and the thin-film transistor, and a thickness of the insulating layer is less than a thickness of the buffer layer.

Provided is an electronic device using an interface between BaSnO.sub.3 and LaInO.sub.3, the electronic device including: a substrate formed of a metal oxide of non-SrTiO.sub.3 material a first buffer layer disposed on the substrate and formed of a BaSnO.sub.3 material; a BLSO layer disposed on at least a portion of the first buffer layer and formed of a (Ba.sub.1-x, La.sub.x)SnO.sub.3 material, wherein x has a value equal to or greater than 0 and less than or equal to 1; an LIO layer at least partially disposed on at least a portion of the BLSO layer so as to form an interface between the LIO layer and the BLSO layer, and formed of an LaInO.sub.3 material; and a first electrode layer at least partially in contact with the interface between the BLSO layer and the LIO layer, and formed of at least two or more separated portions.

A semiconductor structure includes a substrate, a first nitride layer, a second nitride layer, a third nitride layer, and a polarity inversion layer. The first nitride layer is formed on the substrate, and the polarity inversion layer formed at a surface of the first nitride layer converts a non-metallic polar surface of the first nitride layer into a metallic polar surface of the polarity inversion layer. The second nitride layer is formed on the polarity inversion layer. The third nitride layer is formed on the second nitride layer.

There is provided a film forming method including: adsorbing fluorine onto a substrate on which a region in which a nitride film is exposed and a region in which an oxide film is exposed are provided adjacent to each other by supplying a fluorine-containing gas to the substrate, and forming a stepped surface on a side surface of the oxide film by selectively etching the nitride film, among the nitride film and the oxide film, so as to cause a surface of the nitride film to be more deeply recessed than a surface of the oxide film; and after the adsorbing the fluorine onto the substrate and forming the stepped surface, selectively forming a semiconductor film on the nitride film, among the nitride film and the oxide film, by supplying a raw material gas including a semiconductor material to the substrate.

A method of manufacturing a semiconductor nanowire semiconductor device is described. The method includes forming an amorphous channel material layer on a substrate, patterning the channel material layer to form semiconductor nanowires extending in a lateral direction on the substrate, and forming a cover layer covering an upper of the semiconductor nanowire. The cover layer and the nanowire are patterned to form a trench exposing a side section of an one end of the semiconductor nanowire and a catalyst material layer is formed in contact with a side surface of the semiconductor nanowire, and metal induced crystallization (MIC) by heat treatment is performed to crystallize the semiconductor nanowire in a length direction of the nanowire from the one end of the semiconductor nanowire in contact with the catalyst material.

The present invention provides two methods for crystallizing a metal oxide semiconductor layer and a semiconductor structure. The first crystallization method is treating an amorphous metal oxide semiconductor layer including indium with oxygen at a pressure of about 550 mtorr to about 5000 mtorr and at a temperature of about 200° C. to about 750° C. The second crystallization method is, firstly, sequentially forming a first amorphous metal oxide semiconductor layer, an aluminum layer, and a second amorphous metal oxide semiconductor layer on a substrate, and, secondly, treating the first amorphous metal oxide semiconductor layer, the aluminum layer, and the second amorphous metal oxide semiconductor layer with an inert gas at a temperature of about 350° C. to about 650° C.

A method of depositing a silicon film on a recess formed in a surface of a substrate is provided. The substrate is placed on a rotary table in a vacuum vessel, so as to pass through first, second, and third processing regions in the vacuum vessel. An interior of the vacuum vessel is set to a first temperature capable of breaking an Si—H bond. In the first processing region, Si.sub.2H.sub.6 gas having a temperature less than the first temperature is supplied to form an SiH.sub.3 molecular layer on its surface. In the second processing region, a silicon atomic layer is exposed on the surface of the substrate, by breaking the Si—H bond in the SiH.sub.3 molecular layer. In the third processing region, by anisotropic etching, the silicon atomic layer on an upper portion of an inner wall of the recess is selectively removed.

A semiconductor-on-insulator substrate for use in RF applications, such as a silicon-on-insulator substrate, comprises a semiconductor top layer, a buried oxide layer and a passivation layer over a support substrate. In addition, a penetration layer is provided between the passivation layer and the silicon support substrate to ensure sufficient high resistivity below RF features and avoid increased migration of dislocations in the support substrate. RE devices may be fabricated on and/or in such a semiconductor-on-insulator substrate.

A mist-CVD apparatus contains a first atomizer for atomizing a first metal oxide precursor and generating a first mist of the first metal oxide precursor; a second atomizer for atomizing a second metal oxide precursor and generating a second mist of the second metal oxide precursor; a carrier-gas supplier for supplying a carrier gas to convey the first and second mists; a film-forming unit for forming a film on a substrate by subjecting the first and second mists to a thermal reaction; and a first conveyance pipe through which the first mist and the carrier gas are conveyed to the film forming chamber, a second conveyance pipe through which the second mist and the carrier gas are conveyed to the film forming chamber.