A semiconductor gate-all-around (GAA) device may include a semiconductor substrate, source and drain regions on the semiconductor substrate, a plurality of semiconductor nanostructures extending between the source and drain regions, a gate surrounding the plurality of semiconductor nanostructures in a gate-all-around arrangement, and a dopant diffusion liner adjacent at least one of the source and drain regions and comprising a first superlattice. The first superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

Embodiments include package substrates and a method of forming the package substrates. A package substrate includes a self-assembled monolayer (SAM) layer over a first dielectric, where the SAM layer includes first end groups and second end groups. The second end groups may include a plurality of hydrophobic moieties. The package substrate also includes a conductive pad on the first dielectric, where the conductive pad has a bottom surface, a top surface, and a sidewall, and where the SAM layer surrounds and contacts a surface of the sidewall of the conductive pad. The hydrophobic moieties may include fluorinated moieties. The conductive pad includes a copper material, where the top surface of the conductive pad has a surface roughness that is approximately equal to a surface roughness of the as-plated copper material. The SAM layer may have a thickness that is approximately 0.1 nm to 20 nm.

There is included (a) forming a chlorine-containing semiconductor layer on an insulating film provided on a surface of a substrate by supplying a first gas containing a semiconductor element and chlorine to the substrate; and (b) forming a semiconductor film on the chlorine-containing semiconductor layer by supplying a second gas containing a semiconductor element to the substrate, wherein a chlorine concentration in the chlorine-containing semiconductor layer formed in (a) is made 1.0×10.sup.20 atoms/cm.sup.3 or more and 1.0× 10.sup.22 atoms/cm.sup.3 or less.

InGaN offers a route to high efficiency overall water splitting under one-step photo-excitation. Further, the chemical stability of metal-nitrides supports their use as an alternative photocatalyst. However, the efficiency of overall water splitting using InGaN and other visible light responsive photocatalysts has remained extremely low despite prior art work addressing optical absorption through band gap engineering. Within this prior art the detrimental effects of unbalanced charge carrier extraction/collection on the efficiency of the four electron-hole water splitting reaction have remained largely unaddressed. To address this growth processes are presented that allow for controlled adjustment and establishment of the appropriate Fermi level and/or band bending in order to allow the photochemical water splitting to proceed at high rate and high efficiency. Beneficially, establishing such material surface charge properties also reduces photo-corrosion and instability under harsh photocatalysis conditions.

A method for making a semiconductor device may include forming a first single crystal silicon layer having a first percentage of silicon 28, and forming a superlattice above the first single crystal silicon layer. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions. The method may further include forming a second single crystal silicon layer above the superlattice having a second percentage of silicon 28 higher than the first percentage of silicon 28.

Epitaxial growth of materials, and related systems and articles, are generally described.

Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.

An artificial two-dimensional (2D) material includes a layered atomic structure including a middle atomic layer, a lower atomic layer, and an upper atomic layer. The lower and upper atomic layers are disposed on lower and upper surfaces of the middle atomic layer respectively. The middle atomic layer is a 2D planar atomic structure formed of a transition metal. The lower and upper atomic layers are a 2D planar atomic structure formed of heterogeneous atoms. Atoms of the layered atomic structure are bound by chemical bonding.

A seed layer for inducing nucleation to form a layer of material is described. In an embodiment, the seed layer comprising a layer of two-dimensional monolayer amorphous material having a disordered atomic structure adapted to create localised electronic states to form electric potential wells for bonding adatoms to a surface of the seed layer via van der Waals interaction to form the layer of material, wherein each of the electric potential wells has a potential energy larger in magnitude than surrounding thermal energy to capture adatoms on the surface of the seed layer. Embodiments in relation to a method for forming the seed layer, a heterostructure comprising the seed layer, a method for forming the heterostructure comprising the seed layer, a device comprising the heterostructure and a method of enhancing vdW interaction between adatoms and a surface of the seed layer are also described.

Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.