Embodiments of mechanisms for forming dislocations in source and drain regions of finFET devices are provided. The mechanisms involve recessing fins and removing the dielectric material in the isolation structures neighboring fins to increase epitaxial regions for dislocation formation. The mechanisms also involve performing a pre-amorphous implantation (PAI) process either before or after the epitaxial growth in the recessed source and drain regions. An anneal process after the PAI process enables consistent growth of the dislocations in the source and drain regions. The dislocations in the source and drain regions (or stressor regions) can form consistently to produce targeted strain in the source and drain regions to improve carrier mobility and device performance for NMOS devices.

An electrical isolation device including a support with thickness E including two faces facing one another, referred to, respectively, as the two faces having a length L, a width l; on each face of the support, a plurality of voltage dividers is positioned extending over the length, each voltage divider including electrical components that are connected in series and arranged according to a first and a second stage, each first stage including a row of even components and a row of odd components, the rows being parallel, and adjacent, and the second stage corresponding to a linear arrangement of components.

A field-effect transistor and method for fabricating such a field-effect transistor that utilizes an air-sensitive two-dimensional material (e.g., silicene). A film of air-sensitive two-dimensional material is deposited on a crystalized metallic (e.g., Ag) thin film on a substrate (e.g., mica substrate). A capping layer of insulating material (e.g., aluminum oxide) is deposited on the air-sensitive two-dimensional material. The substrate is detached from the metallic thin film/air-sensitive two-dimensional material/insulating material stack structure. The metallic thin film/air-sensitive two-dimensional material/insulating material stack structure is then flipped. The flipped metallic thin film/air-sensitive two-dimensional material/insulating material stack structure is attached to a device substrate followed by having the metallic thin film etched to form contact electrodes. In this manner, the pristine properties of air-sensitive two-dimensional materials are preserved from degradation when exposed to air. Furthermore, this new technique allows safe transfer and device fabrication of air-sensitive two-dimensional materials with a low material and process cost.

A method includes forming a protruding semiconductor stack including a plurality of sacrificial layers and a plurality of nanostructures, with the plurality of sacrificial layers and the plurality of nanostructures being laid out alternatingly. The method further includes forming a dummy gate structure on the protruding semiconductor stack, etching the protruding semiconductor stack to form a source/drain recess, and forming a source/drain region in the source/drain recess. The formation of the source/drain region includes growing first epitaxial layers. The first epitaxial layers are grown on sidewalls of the plurality of nanostructures, and a cross-section of each of the first epitaxial layers has a quadrilateral shape. The first epitaxial layers have a first dopant concentration. The formation of the source/drain region further includes growing a second epitaxial layer on the first epitaxial layers. The second epitaxial layer has a second dopant concentration higher than the first dopant concentration.

Provided are a method of manufacturing a multi-component semiconductor nanocrystal, a multi-component semiconductor nanocrystal manufactured by the method, and a quantum dot including the same. The method includes irradiating microwaves to a semiconductor nanocrystal synthesis composition, and the semiconductor nanocrystal synthesis composition includes a precursor including a Group I element, a precursor including a Group II element, a precursor including a Group III element, a precursor including a Group V element, a precursor including a Group VI element, or any combination thereof.

A film deposition method may include preparing a non-planar substrate including a first surface, a second surface, and an inclined surface between the first surface and the second surface; depositing a film having a thickness deviation on the first surface, the second surface, and the inclined surface; and etching the film deposited on the first surface, the second surface, and the inclined surface. A height of the second surface may be different than a height of the first surface.

A Group III-Nitride quantum well laser including a distributed Bragg reflector (DBR). In some embodiments, the DBR includes Scandium. In some embodiments, the DBR includes Al.sub.1-xSc.sub.xN, which may have 0<x≤0.45.

Embodiments of the present disclosure relate to methods for depositing an amorphous carbon layer onto a substrate, including over previously formed layers on the substrate, using a plasma-enhanced chemical vapor deposition (PECVD) process. In particular, the methods described herein utilize a combination of RF AC power and pulsed DC power to create a plasma which deposits an amorphous carbon layer with a high ratio of sp3 (diamond-like) carbon to sp2 (graphite-like) carbon. The methods also provide for lower processing pressures, lower processing temperatures, and higher processing powers, each of which, alone or in combination, may further increase the relative fraction of sp3 carbon in the deposited amorphous carbon layer. As a result of the higher sp3 carbon fraction, the methods described herein provide amorphous carbon layers having improved density, rigidity, etch selectivity, and film stress as compared to amorphous carbon layers deposited by conventional methods.

Energy bands of a thin film containing molecular clusters are tuned by controlling the size and the charge of the clusters during thin film deposition. Using atomic layer deposition, an ionic cluster film is formed in the gate region of a nanometer-scale transistor to adjust the threshold voltage, and a neutral cluster film is formed in the source and drain regions to adjust contact resistance. A work function semiconductor material such as a silver bromide or a lanthanum oxide is deposited so as to include clusters of different sizes such as dimers, trimers, and tetramers, formed from isolated monomers. A type of Atomic Layer Deposition system is used to deposit on semiconductor wafers molecular clusters to form thin film junctions having selected energy gaps. A beam of ions contains different ionic clusters which are then selected for deposition by passing the beam through a filter in which different apertures select clusters based on size and orientation.

Atomic layer deposition (ALD) processes for forming Group VA element containing thin films, such as Sb, Sb—Te, Ge—Sb and Ge—Sb—Te thin films are provided, along with related compositions and structures. Sb precursors of the formula Sb(SiR.sup.1R.sup.2R.sup.3).sub.3 are preferably used, wherein R.sup.1, R.sup.2, and R.sup.3 are alkyl groups. As, Bi and P precursors are also described. Methods are also provided for synthesizing these Sb precursors. Methods are also provided for using the Sb thin films in phase change memory devices.