A display apparatus and a method of manufacturing the same are provided. According to an embodiment, a display apparatus includes: a substrate; a thin-film transistor located on the substrate; and a buffer layer, a conductive layer, and an insulating layer sequentially located from the substrate between the substrate and the thin-film transistor, and a thickness of the insulating layer is less than a thickness of the buffer layer.

There is provided a film forming method including: adsorbing fluorine onto a substrate on which a region in which a nitride film is exposed and a region in which an oxide film is exposed are provided adjacent to each other by supplying a fluorine-containing gas to the substrate, and forming a stepped surface on a side surface of the oxide film by selectively etching the nitride film, among the nitride film and the oxide film, so as to cause a surface of the nitride film to be more deeply recessed than a surface of the oxide film; and after the adsorbing the fluorine onto the substrate and forming the stepped surface, selectively forming a semiconductor film on the nitride film, among the nitride film and the oxide film, by supplying a raw material gas including a semiconductor material to the substrate.

A method of fabricating a hollow wall for controlling directional deposition of material comprises: forming a layer of resist on a substrate; removing a portion of the resist selectively to form a channel in the resist; forming a layer of an amorphous dielectric material in the channel; and removing the resist to form the hollow wall. The channel has a front surface configured to prevent bending of a corresponding front face of the hollow wall. The hollow wall is useful for controlling deposition of material when fabricating semiconductor-superconductor hybrid devices, for example. By configuring the channel appropriately, bending of the hollow wall can be prevented, allowing for more precise deposition of material. Also provided is a further method of fabricating a hollow wall; and a method of fabricating a device using the hollow walls.

A process for producing nanoclusters of silicon and/or germanium exhibiting a permanent magnetic and/or electric dipole moment for adjusting the work function of materials, for micro- and nano-electronics, for telecommunications, for “nano-ovens”, for organic electronics, for photoelectric devices, for catalytic reactions and for fractionation of water.

In an aspect, a mixed metal oxide comprises or consists essentially of: a mixture comprises or consisting essentially of 0.30 to 0.69 parts by mole Mg, 0.20 to 0.69 parts by mole Zn, 0.01 to 0.30 parts by mole of a third element selected from Al and Ga, and, either, when the third element is Al, 0.00 to 0.31 parts by mole of other elements selected from metals and metalloids, or, when the third element is Ga, 0.00 to 0.15 parts by mole of other elements selected from metals and metalloids, wherein the sum of all parts by mole of Mg, Zn, the third element, and the other elements amounts to 1.00, wherein the amount in parts by mole of the other elements is lower than the amount in parts by mole of Mg and is lower than the amount in parts by mole of Zn; oxygen; and less than 0.01 parts by mole of non-metallic and non-metalloid impurities.

A semiconductor memory device according to an embodiment, includes a semiconductor pillar extending in a first direction, a first electrode extending in a second direction crossing the first direction, a second electrode provided between the semiconductor pillar and the first electrode, a first insulating film provided between the semiconductor pillar and the second electrode, and a second insulating film provided between the first electrode and the second electrode. The second electrode includes a thin sheet portion disposed on the first electrode side, and a thick sheet portion disposed on the semiconductor pillar side. A length in the first direction of the thick sheet portion is longer than a length in the first direction of the thin sheet portion.

The present invention provides two methods for crystallizing a metal oxide semiconductor layer and a semiconductor structure. The first crystallization method is treating an amorphous metal oxide semiconductor layer including indium with oxygen at a pressure of about 550 mtorr to about 5000 mtorr and at a temperature of about 200° C. to about 750° C. The second crystallization method is, firstly, sequentially forming a first amorphous metal oxide semiconductor layer, an aluminum layer, and a second amorphous metal oxide semiconductor layer on a substrate, and, secondly, treating the first amorphous metal oxide semiconductor layer, the aluminum layer, and the second amorphous metal oxide semiconductor layer with an inert gas at a temperature of about 350° C. to about 650° C.

A semiconductor device and a method of fabricating a semiconductor device, the device including a semiconductor substrate that includes a trench defining an active region; a buried dielectric pattern in the trench; a silicon oxide layer between the buried dielectric pattern and an inner wall of the trench; and a polycrystalline silicon layer between the silicon oxide layer and the inner wall of the trench, wherein the polycrystalline silicon layer has a first surface in contact with the semiconductor substrate and a second surface in contact with the silicon oxide layer, and wherein the second surface includes a plurality of silicon grains that are uniformly distributed.

A thin film transistor includes an active layer including a first portion having a first thickness and a second portion having a second thickness greater than the first thickness, a capping layer filling a thickness difference between the first portion and the second portion and arranged on the first portion, a gate insulating layer arranged on the capping layer, a gate electrode on the active layer, wherein the gate insulating layer and the capping layer are disposed between the gate electrode and the active layer, and a source electrode and a drain electrode connected to the active layer.

A method of producing a reduced-defect density crystalline silicon film includes forming a first intrinsic silicon film on a substrate, forming a doped film including silicon or germanium on the first intrinsic silicon film, forming a second intrinsic silicon film on the doped film, and annealing to crystallize the doped film, the second intrinsic silicon film, and the first intrinsic silicon, wherein each film is amorphous at formation, wherein crystallization initiates within the doped film. A method of forming a thin film transistor includes forming an active layer in the crystallized second intrinsic silicon layer by doping the crystallized second intrinsic silicon layer in selected areas to form source and drain regions separated by a channel portion, forming a gate insulator layer on the crystallized second intrinsic silicon layer, and forming a gate electrode pattern over the gate insulator layer.