Methods for adjusting a work function of a structure in a substrate leverage near surface doping. In some embodiments, a method for adjusting a work function of a structure in a substrate may include growing an epitaxial layer on surfaces of the structure to form a homogeneous passivation region as part of a substrate material of the substrate and performing a dopant diffusion process to further embed the dopants into surfaces of the structure to adjust a work function of the structure, wherein the dopant diffusion process is performed at less than approximately 450 degrees Celsius.

A method of manufacturing a semiconductor device includes: forming a trench in a first side of a semiconductor layer, the semiconductor layer including a drift zone of a first conductivity; forming a drain region of the first conductivity type in the first side of the semiconductor layer and laterally adjoining the drift zone; forming a body region of a second conductivity type opposite the first conductivity type and laterally adjoining the drift zone at a side of the drift zone opposite the drain region; and forming source regions of the first conductivity type and body contact regions of the second conductivity type in a sidewall of the trench and arranged in an alternating manner along a length of the trench, using a dopant diffusion process which includes diffusing dopants of both conductivity types from oppositely-doped dopant source layers which are in contact with different regions of the sidewall.

Non-planar semiconductor devices having doped sub-fin regions and methods of fabricating non-planar semiconductor devices having doped sub-fin regions are described. For example, a method of fabricating a semiconductor structure involves forming a plurality of semiconductor fins above a semiconductor substrate. A solid state dopant source layer is formed above the semiconductor substrate, conformal with the plurality of semiconductor fins. A dielectric layer is formed above the solid state dopant source layer. The dielectric layer and the solid state dopant source layer are recessed to approximately a same level below a top surface of the plurality of semiconductor fins, exposing protruding portions of each of the plurality of semiconductor fins above sub-fin regions of each of the plurality of semiconductor fins. The method also involves driving dopants from the solid state dopant source layer into the sub-fin regions of each of the plurality of semiconductor fins.

A method of processing a substrate that includes: loading the substrate in a processing chamber, the substrate including a raised feature of a semiconductor; forming a conformal dopant layer on the raised feature by atomic layer deposition (ALD); forming a metal layer over the raised feature; thermally treating the dopant layer to form an ultra-shallow dopant region in the raised feature by diffusion of a dopant from the dopant layer into the raised feature; and thermally treating the metal layer to form an ohmic contact region in the raised feature by diffusion of a metal from the metal layer into the raised feature.

The present disclosure relates to the deposition of dopant films, such as doped silicon oxide films, by atomic layer deposition processes. In some embodiments, a substrate in a reaction space is contacted with pulses of a silicon precursor and a dopant precursor, such that the silicon precursor and dopant precursor adsorb on the substrate surface. Oxygen plasma is used to convert the adsorbed silicon precursor and dopant precursor to doped silicon oxide.

A semiconductor apparatus including a capacitor and a method of manufacturing the same, and an electronic device including the semiconductor apparatus are provided. According to embodiments, the semiconductor apparatus may include: a vertical semiconductor device including an active region extending vertically on a substrate; and a capacitor including a first capacitor electrode, a capacitor dielectric layer and a second capacitor electrode sequentially stacked. The first capacitor electrode extends vertically on the substrate and includes a conductive material, and the conductive material includes at least one semiconductor element contained in the active region of the vertical semiconductor device.

Provided are a semiconductor device, a method of manufacturing the semiconductor device, and an electronic apparatus including the device. According to the embodiments, the semiconductor device may include: an active region extending substantially in a vertical direction on a substrate; a gate stack formed around at least a portion of an outer periphery of a middle section of the active region in the vertical direction, wherein the active region comprises a channel region opposite to the gate stack, and a first source/drain region and a second source/drain region located on two opposite sides of the channel region in the vertical direction; a first spacer located between a conductor layer of the gate stack and the first source/drain region, and a second spacer located between the conductor layer of the gate stack and the second source/drain region.

Non-planar semiconductor devices having doped sub-fin regions and methods of fabricating non-planar semiconductor devices having doped sub-fin regions are described. For example, a method of fabricating a semiconductor structure involves forming a plurality of semiconductor fins above a semiconductor substrate. A solid state dopant source layer is formed above the semiconductor substrate, conformal with the plurality of semiconductor fins. A dielectric layer is formed above the solid state dopant source layer. The dielectric layer and the solid state dopant source layer are recessed to approximately a same level below a top surface of the plurality of semiconductor fins, exposing protruding portions of each of the plurality of semiconductor fins above sub-fin regions of each of the plurality of semiconductor fins. The method also involves driving dopants from the solid state dopant source layer into the sub-fin regions of each of the plurality of semiconductor fins.

A method of doping a substrate. The method may include providing a substrate in a process chamber. The substrate may include a semiconductor structure, and a dopant layer disposed on a surface of the semiconductor structure. The method may include maintaining the substrate at a first temperature for a first interval, the first temperature corresponding to a vaporization temperature of the dopant layer. The method may further include rapidly cooling the substrate to a second temperature, less than the first temperature, and heating the substrate from the second temperature to a third temperature, greater than the first temperature.

A semiconductor device has a first trench and a second trench of a trench structure located in a substrate. The second trench is separated from the first trench by a trench space that is less than a first trench width of the first trench and less than a second trench width of the second trench. The trench structure includes a doped sheath having a first conductivity type, contacting and laterally surrounding the first trench and the second trench. The doped sheath extends from the top surface to an isolation layer and from the first trench to the second trench across the trench space. The semiconductor device includes a first region and a second region, both located in the semiconductor layer, having a second, opposite, conductivity type. The first region and the second region are separated by the first trench, the second trench, and the doped sheath.