A method of manufacturing a semiconductor device includes providing a substrate structure, the substrate structure having a semiconductor substrate including a first semiconductor fin, a first gate structure, and a first mask layer on a first semiconductor region. The method includes forming a second mask layer on the substrate structure, etching first mask layer and second mask layer to expose a portion of a first semiconductor fin not covered by the first gate structure, performing a first ion implantation on an exposed portion of the first semiconductor fin to introduce impurities into a portion of the first semiconductor fin located below the first gate structure, etching the first semiconductor fin to remove a portion of an exposed portion of the first semiconductor fin, and epitaxially growing a first semiconductor material on the remaining portions of the first semiconductor fin to form a first source region and a first drain region.

A substrate support assembly includes a ceramic plate having an optical transmittance of at least 60% at a predetermined wavelength, the ceramic plate comprising a top surface and a bottom surface, wherein the top surface is to support a substrate. The substrate support assembly further includes a cooling base coupled to the bottom surface of the ceramic plate. The substrate support assembly further includes a light carrying medium disposed in the base, the light carrying medium to direct light having the predetermined wavelength onto the bottom surface of the ceramic plate, wherein a majority of energy from the light is to pass through the ceramic plate or light carrying medium attached inside holes of ceramic plate and be absorbed by the substrate.

A plasma processing apparatus includes: a processing container which defines a processing space; a microwave generator; a dielectric having an opposing surface which faces the processing space; a slot plate formed with a plurality of slots; and a heating member provided within the slot plate. The slot plate is provided on a surface of the dielectric at an opposite side to the opposing surface to radiate microwaves for plasma excitation to the processing space through the dielectric based on the microwaves generated by the microwave generator.

A manufacturing method of a monocrystalline silicon includes: a growth step in which a seed crystal having contacted a silicon melt is pulled up and a crucible is rotated and raised to form a straight body of the monocrystalline silicon; a separating step in which the monocrystalline silicon is separated from the silicon melt; a state holding step in which the crucible and the monocrystalline silicon are lowered and the monocrystalline silicon is kept at a level at which an upper end of the straight body is located at the same level as an upper end of a heat shield or is located below the upper end of the heat shield for a predetermined time; and a draw-out step in which the monocrystalline silicon is drawn out of a chamber.

Provided is an electrode assembly which may be manufactured by providing a first substrate and a second substrate, plasma treating the first substrate, forming an electrode on the first substrate, and thermally compressing the first substrate and the second substrate, with the electrode therebetween, wherein each of the first substrate and the second substrate includes a fluorine-based polymer.

A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer. The first insulating layer includes a third region overlapping with the first conductive layer and a fourth region not overlapping with the first conductive layer. Furthermore, the second region and the fourth region contain phosphorus or boron.

The present invention provides an efficient heat treatment such as activation treatment of impurities on a substrate such as a thick silicon wafer with large heat capacity by laser annealing.

Provided is a laser annealing apparatus 1 for heat-treating a surface of a substrate 30 comprising: a pulse oscillation laser source 10 which generates a pulse laser with gentle rise time and long pulse width; a continuous wave laser source 20 which generates a near-infrared laser for assisting annealing; optical systems 12, 22 which shape and guide beams 15, 25 of the two types of lasers respectively so as to irradiate the surface of the substrate 30 therewith; and a moving device 3 which moves the substrate 30 relatively to the laser beams 15, 25 to allow scanning of the combined irradiation of the two types of laser beams. According to this apparatus, deep activation of impurities can be performed in a thick semiconductor substrate with large heat capacity while securing sufficient light penetration depth and thermal diffusion length therefor.

Provided is a semiconductor device and a method for forming the same. The device has a substrate including one and another surfaces. A first semiconductor region of a first conductivity type is formed in the substrate. A second conductivity type, second semiconductor region is provided in a first surface layer, that includes the one surface, of the substrate. A first electrode is in contact with the second semiconductor region to form a junction therebetween. A first conductivity type, third semiconductor region is provided in a second surface layer, that includes the another surface, of the substrate. The third semiconductor region has a higher impurity concentration than the first semiconductor region. A fourth semiconductor region of the second conductivity type is provided in the first semiconductor region at a location deeper than the third semiconductor region from the another surface. A second electrode is in contact with the third semiconductor region.

A method includes performing an anneal on a wafer. The wafer includes a wafer-edge region, and an inner region encircled by the wafer-edge region. During the anneal, a first power applied on a portion of the wafer-edge region is at least lower than a second power for annealing the inner region.

A method includes placing a wafer into a production chamber, providing a heating source to heat the wafer, and projecting a laser beam on the wafer using a laser projector. The method further includes, when the wafer is heated by both of the heating source and the laser beam, performing a process selected from an epitaxy process to grow a semiconductor layer on the wafer, and an etching process to etch the semiconductor layer.