The application provides a method for manufacturing a semiconductor device. The method includes the following operations. A semiconductor substrate is provided, a plurality of separate trenches being formed in the semiconductor substrate. Plasma injection is performed to form a barrier layer between adjacent trenches A respective gate structure is formed in each of the plurality of trenches. A plurality of channel regions are formed in the semiconductor substrate, each of the plurality of trenches corresponding to a respective one of the plurality of channel regions. A source/drain region is formed between each of the plurality of trenches and the barrier layer, the source/drain region being electrically connected to the respective one of the plurality of channel regions, and a conductive type of the barrier layer is opposite to a conductive type of the source/drain region.

A photomask includes a reticle substrate, a main pattern disposed on the reticle substrate and defining a photoresist pattern realized on a semiconductor substrate, and anti-reflection patterns adjacent to the main pattern. A distance between a pair of the anti-reflection patterns adjacent to each other is a first length, and a width of at least one of the pair of anti-reflection patterns is a second length. A sum of the first length and the second length is equal to or smaller than a minimum pitch defined by resolution of an exposure process. A distance between the main pattern and the anti-reflection pattern nearest to the main pattern is equal to or smaller than the first length.

A semiconductor device includes a nanowire structure and a stressor. The nanowire structure includes a first channel section and a second channel section. The stressor subjects the first channel section to a first strain level and the second channel section to a second strain level greater than the first strain level. The difference between the second strain level and the first strain level is less than the second strain level.

An integrated circuit structure includes a first semiconductor strip, first isolation regions on opposite sides of the first semiconductor strip, and a first epitaxy strip overlapping the first semiconductor strip. A top portion of the first epitaxy strip is over a first top surface of the first isolation regions. The structure further includes a second semiconductor strip, wherein the first and the second semiconductor strips are formed of the same semiconductor material. Second isolation regions are on opposite sides of the second semiconductor strip. A second epitaxy strip overlaps the second semiconductor strip. A top portion of the second epitaxy strip is over a second top surface of the second isolation regions. The first epitaxy strip and the second epitaxy strip are formed of different semiconductor materials. A bottom surface of the first epitaxy strip is lower than a bottom surface of the second epitaxy strip.

A semiconductor device includes a semiconductor part; first and second electrodes respectively on back and front surfaces of the semiconductor part; and a control electrode between the semiconductor part and the second electrode. The control electrode is provided inside a trench of the semiconductor part. The control electrode is electrically insulated from the semiconductor part by a first insulating film and electrically insulated from the second electrode by a second insulating film. The control electrode includes an insulator at a position apart from the first insulating film and the second insulating film. The semiconductor part includes a first layer of a first conductivity type provided between the first and second electrodes, the second layer of a second conductivity type provided between the first layer and the second electrode and the third layer of the first conductivity type selectively provided between the second layer and the second electrode.

A semiconductor device comprises a substrate, a gate structure and a gate spacer. The substrate has a semiconductor fin protruding from a surface of the substrate. The gate structure is disposed on the semiconductor fin. The gate spacer is disposed on sidewalls of the gate structure, wherein the gate spacer comprises a first material layer and a second material layer stacked with each other and both of these two material layers are directly in contact with the gate structure.

Semiconductor devices and methods of forming the same are provided. A method according to the present disclosure includes providing a workpiece including a frontside and a backside. The workpiece includes a substrate, a first plurality of channel members over a first portion of the substrate, a second plurality of channel members over a second portion of the substrate, an isolation feature sandwiched between the first and second portions of the substrate. The method also includes forming a joint gate structure to wrap around each of the first and second pluralities of channel members, forming a pilot opening in the isolation feature, extending the pilot opening through the join gate structure to form a gate cut opening that separates the joint gate structure into a first gate structure and a second gate structure, and depositing a dielectric material into the gate cut opening to form a gate cut feature.

A transistor, including an antiferroelectric (AFE) gate dielectric layer is described. The AFE gate dielectric layer may be crystalline and include oxygen and a dopant. The transistor further includes a gate electrode on the AFE gate dielectric layer, a source structure and a drain structure on the substrate, where the gate electrode is between the source structure and the drain structure. The transistor further includes a source contact coupled with the source structure and a drain contact coupled with the drain structure.

A semiconductor device includes a semiconductor substrate, a gate insulator provided on a surface of the semiconductor substrate, a bonding film, including silicon or aluminum, provided on the gate insulator, and a gate pad layer provided above the bonding film, wherein the gate pad layer includes titanium in at least a region in contact with the bonding film.

A semiconductor device includes a semiconductor part; first and second electrodes respectively on back and front surfaces of the semiconductor part; and a control electrode between the semiconductor part and the second electrode. The control electrode is provided inside a trench of the semiconductor part. The control electrode is electrically insulated from the semiconductor part by a first insulating film and electrically insulated from the second electrode by a second insulating film. The control electrode includes an insulator at a position apart from the first insulating film and the second insulating film. The semiconductor part includes a first layer of a first conductivity type provided between the first and second electrodes, the second layer of a second conductivity type provided between the first layer and the second electrode and the third layer of the first conductivity type selectively provided between the second layer and the second electrode.