Patent classifications
H01L21/3063
Electrochemical imprinting of micro- and nano-structures in porous silicon, silicon, and other semiconductors
An imprinting platform including a noble metal catalyst, a semiconductor substrate, and a pre-patterned polymer stamp, where the catalyst is attached to the stamp, and related methods and articles.
Electrochemical imprinting of micro- and nano-structures in porous silicon, silicon, and other semiconductors
An imprinting platform including a noble metal catalyst, a semiconductor substrate, and a pre-patterned polymer stamp, where the catalyst is attached to the stamp, and related methods and articles.
Metal-coated porous polymeric stamp materials for electrochemical imprinting
A metal-assisted chemical imprinting stamp includes a porous polymer substrate and a noble metal coating formed directly on the porous polymer substrate. Fabricating the metal-assisted chemical imprinting stamp includes providing a porous polymer substrate, and disposing a noble metal on the porous polymer substrate. Metal-assisted chemical imprinting includes positioning a silicon substrate in an etching solution, contacting a surface of the silicon substrate with a stamp comprising a noble metal layer on a surface of a porous polymer substrate, and separating the silicon substrate from the stamp to yield a pattern corresponding to the noble metal layer on the silicon substrate.
Metal-coated porous polymeric stamp materials for electrochemical imprinting
A metal-assisted chemical imprinting stamp includes a porous polymer substrate and a noble metal coating formed directly on the porous polymer substrate. Fabricating the metal-assisted chemical imprinting stamp includes providing a porous polymer substrate, and disposing a noble metal on the porous polymer substrate. Metal-assisted chemical imprinting includes positioning a silicon substrate in an etching solution, contacting a surface of the silicon substrate with a stamp comprising a noble metal layer on a surface of a porous polymer substrate, and separating the silicon substrate from the stamp to yield a pattern corresponding to the noble metal layer on the silicon substrate.
Method of electrochemically processing a substrate and integrated circuit device
A substrate has a front side including an electrical circuit and a rear side including an exposed zone that faces the electrical circuit. In an electrochemical treatment step, an electrical potential is laterally applied at least to the exposed zone of the rear side of the substrate, while the exposed zone is in contact with a chemically reactive substance. The electrical potential causes a lateral flow of electrical current at least in the exposed zone of the substrate. The lateral flow of current and the chemically reactive substance alter the substrate in at least the exposed zone.
Method of electrochemically processing a substrate and integrated circuit device
A substrate has a front side including an electrical circuit and a rear side including an exposed zone that faces the electrical circuit. In an electrochemical treatment step, an electrical potential is laterally applied at least to the exposed zone of the rear side of the substrate, while the exposed zone is in contact with a chemically reactive substance. The electrical potential causes a lateral flow of electrical current at least in the exposed zone of the substrate. The lateral flow of current and the chemically reactive substance alter the substrate in at least the exposed zone.
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
A method forms a part of a power semiconductor device. The method includes homoepitaxially forming two silicon carbide layers on a first side of a silicon carbide substrate and forming a pattern of pits on a second side of the silicon carbide substrate. The two layers include a buffer layer, on the first side of the silicon carbide substrate, and have a same doping type of the silicon carbide substrate and a doping concentration equal to or greater than 10.sup.17 cm.sup.−3 in order to increase the quality of at least one subsequent SiC layer. The two layers include an etch stopper layer, being deposited on the buffer layer and has a same doping type as the buffer layer but a lower doping concentration in order to block a trenching process. The pattern of pits, obtained by electrochemical etching, extends completely thorough the silicon carbide substrate and the buffer layer.
Apparatus and method for etching one side of a semiconductor layer of a workpiece
An apparatus for etching one side of a semiconductor layer of a workpiece, including at least one etching basin for receiving an electrolyte, a first electrode which is provided for electrically contacting the electrolyte located in the etching basin, a second electrode which is provided for electrically contacting the semiconductor layer, a electrical power source which is electrically conductively connected to the first and the second electrodes for generating an etching current, and a transport apparatus for transporting the workpiece relative to the etching basin such that a semiconductor layer etching face to be etched can be wetted by the electrolyte in the etching basin. The transport apparatus has a negative pressure holding element for the workpiece, designed to position the workpiece on a retaining face of the workpiece opposite to the etching face by negative pressure, and the second electrode is positioned on the negative pressure holding element such that, when the workpiece is positioned on the negative pressure holding element, the retaining face of the workpiece is contacted by the second electrode. A method for etching one side of a semiconductor layer of a workpiece is also provided.
Apparatus and method for etching one side of a semiconductor layer of a workpiece
An apparatus for etching one side of a semiconductor layer of a workpiece, including at least one etching basin for receiving an electrolyte, a first electrode which is provided for electrically contacting the electrolyte located in the etching basin, a second electrode which is provided for electrically contacting the semiconductor layer, a electrical power source which is electrically conductively connected to the first and the second electrodes for generating an etching current, and a transport apparatus for transporting the workpiece relative to the etching basin such that a semiconductor layer etching face to be etched can be wetted by the electrolyte in the etching basin. The transport apparatus has a negative pressure holding element for the workpiece, designed to position the workpiece on a retaining face of the workpiece opposite to the etching face by negative pressure, and the second electrode is positioned on the negative pressure holding element such that, when the workpiece is positioned on the negative pressure holding element, the retaining face of the workpiece is contacted by the second electrode. A method for etching one side of a semiconductor layer of a workpiece is also provided.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING STRUCTURE
There is provided a semiconductor device, including: a substrate; a group III nitride layer on the substrate, the group III nitride layer containing group III nitride; and a recess on the group III nitride layer, the group III nitride layer including: a channel layer, and a barrier layer on the channel layer, thereby forming a two-dimensional electron gas in the channel layer, the barrier layer including: a first layer containing aluminum gallium nitride, and a second layer on the first layer, the second layer containing aluminum gallium nitride added with an n-type impurity, wherein the recess is formed by removing all or a part of a thickness of the second layer, and at least a part of a thickness of the first layer is arranged below the recess.