A method for manufacturing a semiconductor device includes the following steps. A channel layer and a barrier layer are sequentially formed on a substrate by an epitaxial process to form a semiconductor device. The channel layer includes a first III-V compound and the barrier layer includes a second III-V compound. The semiconductor device is disposed within a cavity. A high-pressure fluid is introduced into the cavity to perform a passivation treatment on defects of the semiconductor device with the high-pressure fluid. The high-pressure fluid is doped with a compound composed of at least one of nitrogen, oxygen, and fluorine.

A high-electron mobility transistor includes a substrate layer, a first buffer layer provided on the substrate layer, a barrier layer provided on the first buffer layer, a source provided on the barrier layer, a drain provided on the barrier layer, and a gate provided on the barrier layer. The transistor further includes a p-type material layer having a length parallel to a surface of the substrate layer over which the first buffer layer is provided, the length of the p-type material layer being less than an entire length of the substrate layer. The p-type material layer is provided in one of the following: the substrate layer, or the first buffer layer. A process of making the high-electron mobility transistor is disclosed as well.

A high-electron mobility transistor includes a substrate layer, a first buffer layer provided on the substrate layer, a barrier layer provided on the first buffer layer, a source provided on the barrier layer, a drain provided on the barrier layer, and a gate provided on the barrier layer. The transistor further includes a p-type material layer having a length parallel to a surface of the substrate layer over which the first buffer layer is provided, the length of the p-type material layer being less than an entire length of the substrate layer. The p-type material layer is provided in one of the following: the substrate layer, or the first buffer layer. A process of making the high-electron mobility transistor is disclosed as well.

A method of manufacturing semiconductor device of an embodiment includes performing a first ion implantation implanting at least one element selected from a group consisting of beryllium (Be), magnesium (Mg), calcium (Ca), strontium (Sr), barium (Ba), zinc (Zn), cadmium (Cd), silicon (Si), germanium (Ge), and tin (Sn) into a nitride semiconductor layer; performing a second ion implantation implanting nitrogen (N) into the nitride semiconductor layer; performing a third ion implantation implanting hydrogen (H) into the nitride semiconductor layer; forming a covering layer on a surface of the nitride semiconductor layer after the first ion implantation, the second ion implantation, and the third ion implantation; performing a first heat treatment after forming the covering layer; removing the covering layer after the first heat treatment; and performing a second heat treatment after removing the covering layer.

In a method, a structure including two or more materials having different coefficients of thermal expansion is prepared, and the structure is subjected to a cryogenic treatment. In one or more of the foregoing and following embodiments, the structure includes a semiconductor wafer and one or more layers are formed on the semiconductor wafer.

A high-electron mobility transistor includes a substrate layer, a first buffer layer provided on the substrate layer, a barrier layer provided on the first buffer layer, a source provided on the barrier layer, a drain provided on the barrier layer, and a gate provided on the barrier layer. The transistor further includes a p-type material layer having a length parallel to a surface of the substrate layer over which the first buffer layer is provided, the length of the p-type material layer being less than an entire length of the substrate layer. The p-type material layer is provided in one of the following: the substrate layer, or the first buffer layer. A process of making the high-electron mobility transistor is disclosed as well.

A device according to embodiments of the invention includes a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A surface of the p-type region perpendicular to a growth direction of the semiconductor structure includes a first portion and a second portion. The first portion is less conductive than the second portion. The device further includes a p-contact formed on the p-type region. The p-contact includes a reflector and a blocking material. The blocking material is disposed over the first portion and no blocking material is disposed over the second portion.

A method for reducing defects of an electronic component using a supercritical fluid includes recrystallizing and rearranging grains in the electronic component by introducing the supercritical fluid doped with H.sub.2S together with an electromagnetic wave into a cavity. The cavity has a temperature above a critical temperature of the supercritical fluid and a pressure above a critical pressure of the supercritical fluid.

Nitride semiconductor device includes: a substrate; a first nitride semiconductor layer of a first conductivity above the substrate; a second nitride semiconductor layer of a second conductivity different from the first conductivity, above the first nitride semiconductor layer a first opening penetrating through the second nitride semiconductor layer; an electron transport layer and an electron supply layer disposed along inner surfaces of the first opening, in stated sequence from the substrate-side; a gate electrode above the electron supply layer, covering the first opening; a source electrode connected to the electron supply layer and the electron transport layer, at a position separated from the gate electrode; and a drain electrode on a surface of the substrate opposite to a surface on which the first nitride semiconductor layer is disposed. At least part of the second nitride semiconductor layer is fixed to a potential different from a potential of the source electrode.

Systems and methods of the disclosed embodiments include reducing defects in a semiconductor layer. The defects may be reduced by forming the semiconductor layer on a substrate, removing at least a portion the substrate from an underside of the semiconductor layer, and annealing the semiconductor layer to reduce the defects in the layer. The annealing includes focusing energy at the layer.