Plasma applications are disclosed that operate with argon and other molecular gases at atmospheric pressure, and at low temperatures, and with high concentrations of reactive species. The plasma apparatus and the enclosure that contains the plasma apparatus and the substrate are substantially free of particles, so that the substrate does not become contaminated with particles during processing. The plasma is developed through capacitive discharge without streamers or micro-arcs. The techniques can be employed to remove organic materials from a substrate, thereby cleaning the substrate; to activate the surfaces of materials, thereby enhancing bonding between the material and a second material; to etch thin films of materials from a substrate; and to deposit thin films and coatings onto a substrate; all of which processes are carried out without contaminating the surface of the substrate with substantial numbers of particles.

A leadframe for semiconductor devices, the leadframe comprising a die pad portion having a first planar die-mounting surface and a second planar surface opposed the first surface, the first surface and the second surface having facing peripheral rims jointly defining a peripheral outline of the die pad wherein the die pad comprises at least one package molding compound receiving cavity opening at the periphery of said first planar surface.

A package is disclosed. In one example, the package comprises a substrate having at least one first recess on a front side and at least one second recess on a back side, wherein the substrate is separated into a plurality of separate substrate sections by the at least one first recess and the at least one second recess, an electronic component mounted on the front side of the substrate, and a single encapsulant filling at least part of the at least one first recess and at least part of the at least one second recess. The encapsulant fully circumferentially surrounds sidewalls of at least one of the substrate sections.

Semiconductor chips to be singulated to individual semiconductor devices are arranged onto respective adjacent areas of a mounting substrate such as a pre-molded leadframe. The mounting substrate is made of a laminar, electrically conductive sculptured structure with molded electrically insulating material. Electrically conductive side formations in the adjacent areas of the mounting substrate include first and second pads at front and back surfaces, respectively, of the mounting substrate. The first contact pads at the front surface of the substrate include narrowed portions having side recesses. The second contact pads at the back surface of the substrate include widened portions having side extensions adjacent the side recesses. The electrically insulating material extends into the side recesses to provide anchoring formations of the insulating material to the electrically conductive sculptured structure of the mounting substrate.

A method of forming a leadless packaged semiconductor device. First partial sawing leads is performed on a bottom side of an in-process leadless semiconductor package having a leadframe including die pad with a semiconductor chip thereon, and leads defining top and bottom surfaces and having an inner end and an outer end having a bottom corner region. Conductive bond wires connect to and extending between bond pads on the chip and respective leads, a mold compound is around the die pad, leads, chip, and conductive bond wires while exposing the bottom surface and outer end. The first sawing completely severs the leads while forming only a partial cut in the mold compound. A de-flash process is applied to the bottom side. The second sawing aligned to the partial cuts reaches the partial cuts to complete singulation of the package, wherein the second sawing does not touch the leads.

An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.

In one embodiment, methods for making semiconductor devices are disclosed.

A leadframe having extensions around an outer edge of a die pad are disclosed. More specifically, leadframes are created with a flange formed at the outer edge of the die pad and extending away from the die pad. The flange is bent, such that it is positioned at an angle with respect to the die pad. Leadframes are also created with anchoring posts formed adjacent the outer edge of the die pad and extending away from the die pad. The anchoring posts have a central thickness that is less than a thickness of first and second portions opposite the central portion. When the leadframe is incorporated into a package, molding compound completely surrounds each flange or anchoring post, which increases the bond strength between the leadframe and the molding compound due to increased contact area. The net result is a reduced possibility of delamination at edges of the die pad.

An electronics assembly includes a plurality of planar conductive metal sheets including a first conductive metal sheet, a second conductive metal sheet attached and electrically coupled to the first metal sheet, and a third conductive metal sheet attached and electrically coupled to the second metal sheet. The second metal sheet is located between the first and third conductive metal sheets. Air gaps are defined in the plurality of planar conductive metal sheets to form metal traces that define electrically isolated conductive paths from an outer surface of the first conductive metal sheet to an outer surface of the third conductive metal sheet in a multilevel conductive wiring network. The multilevel conductive wiring network can be attached and electrically coupled to a microchip and to one or more capacitors to form a power converter.

A wiring substrate includes a first metal plate and a second electrode. The first metal plate includes a first electrode, a wiring, and a mount portion for an electronic component. The mount portion includes an upper surface of the wiring. The second electrode is joined to an upper surface of the first electrode. The first electrode is solid. The second electrode is solid.