A protective member forming apparatus includes a resin film adhering unit which causes a resin film to adhere to a front surface of a substrate so as to conform to recesses and projections on the front surface of the substrate, a support table which supports the substrate, a liquid resin supplying unit which supplies a curable liquid resin, a pressing unit which covers the liquid resin supplied to the resin film with a cover film and presses the cover film by a pressing surface to spread the liquid resin over the resin film, and a curing unit which cures the liquid resin being spread. The support table includes an annular bank region having a height not exceeding a thickness of the substrate and housing the substrate therein, and the bank region prevents the liquid resin to be spread by the pressing unit from flowing out from the substrate.

Thermosetting resin compositions useful for liquid compression molding encapsulation of a reconfigured wafer are provided. The so-encapsulated molded wafer offers improved resistance to warpage, compared to reconfigured wafers encapsulated with known encapsulation materials.

A semiconductor package including a semiconductor chip, an interposer on the semiconductor chip, and a molding layer covering at least a portion of the semiconductor chip and at least a portion of the interposer may be provided. The interposer includes a interposer substrate and a heat dissipation pattern penetrating the interposer substrate and electrically insulated from the semiconductor chip. The heat dissipation pattern includes a through electrode disposed in the interposer substrate and an upper pad disposed on an upper surface of the interposer substrate and connected to the through electrode. The molding layer covers at least a portion of a sidewall of the upper pad and the upper surface of the interposer substrate. At least a portion of an upper surface of the upper pad is not covered by the molding layer.

In some embodiments, the present disclosure relates to a package assembly having a bump on a first substrate. A molding compound is on the first substrate and contacts sidewalls of the bump. A no-flow underfill layer is on a conductive region of a second substrate. The no-flow underfill layer and the conductive region contact the bump. A mask layer is arranged on the second substrate and laterally surrounds the no-flow underfill layer. The no-flow underfill layer contacts the substrate between the conductive region and the mask layer.

A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.

A microelectronic assembly having a first side and a second side opposite therefrom is disclosed. The microelectronic assembly may include a microelectronic element having a first face, a second face opposite the first face, a plurality of sidewalls each extending between the first and second faces, and a plurality of element contacts. The microelectronic assembly may also include an encapsulation adjacent the sidewalls of the microelectronic element. The microelectronic assembly may include electrically conductive connector elements each having a first end, a second end remote from the first end, and an edge surface extending between the first and second ends, wherein one of the first end or the second end of each connector element is adjacent the first side of the package. The microelectronic assembly may include a redistribution structure having terminals, the redistribution structure adjacent the second side of the package, the terminals being electrically coupled with the connector elements.

A resin molding apparatus including a release film feeder configured to feed a release film is provided. The release film feeder including a feeding roller around which the release film is wound, a gripper configured to grip an end portion of the release film fed from the feeding roller, a support table configured to support the release film fed by a horizontal movement of the gripper in an X direction, the support table configured to horizontally move at least one of in the X direction or in a Y direction perpendicular to the X direction, the X and Y directions defining a surface parallel to a surface of the support table, and a position detecting sensor on the support table and configured to detect position information of the release film may be provided.

Various semiconductor chip devices and methods of making the same are disclosed. In one aspect, an apparatus is provided that includes a first redistribution layer (RDL) structure having a first plurality of conductor traces, a first molding layer on the first RDL structure, plural conductive pillars in the first molding layer, each of the conductive pillars including a first end and a second end, a second RDL structure on the first molding layer, the second RDL structure having a second plurality of conductor traces, and wherein some of the conductive pillars are electrically connected between some of the first plurality of conductor traces and some of the second plurality of conductor traces to provide a first inductor coil.

Disclosed are wiring substrates, methods of fabricating the same, and methods of fabricating semiconductor packages. The wiring substrate includes a dielectric layer that includes a plurality of unit regions, a sawing region that surrounds each of the unit regions, and an edge region that surrounds the unit regions and the sawing region, a first upper protection pattern on a top surface of the dielectric layer on the unit regions and the sawing region, and a second upper protection pattern on a top surface of the dielectric layer on the edge region. The second upper protection pattern surrounds the first upper protection pattern when viewed in plan and includes a dielectric material different from a dielectric material of the first upper protection pattern.

A semiconductor package includes: a first substrate; a semiconductor chip mounted on the first substrate such that a circuit formation surface is oriented toward the first substrate; a second substrate arranged above the first substrate, the semiconductor chip being sandwiched between the first substrate and the second substrate; and a resin that seals the semiconductor chip and that is filled between the first substrate and the second substrate, wherein the second substrate includes a solder resist layer having a first surface facing a back surface that is an opposite surface of the circuit formation surface of the semiconductor chip, and wherein on an area of the first surface of the solder resist layer facing the back surface of the semiconductor chip, at least one protruding portion that protrudes towards the back surface of the semiconductor chip is provided.