An electronic device includes a plurality of light emitting units, a plurality of sensing units, and a sensor driving unit. The plurality of light emitting units are disposed on a first substrate. The plurality of sensing units correspond to the plurality of light emitting units, and the plurality of light emitting units and the plurality of sensing units are disposed in a same region. The sensor driving unit is coupled to at least a portion of the plurality of sensing units, and the plurality of light emitting units and the sensor driving unit are partially overlapped with each other.

A display device has a display region and a side region adjacent to the display region. The display device includes a plurality of display units, a plurality of sensing units, a display driver and a sensor driving unit. The plurality of display units are disposed on a first substrate. The plurality of sensing units correspond to the plurality of display units. The plurality of display units and the plurality of sensing units are disposed in the display region. The display driver is coupled to at least a portion of the plurality of display units, and includes a plurality of first transistors. The sensor driving unit is coupled to at least a portion of the plurality of sensing units, and includes at least one second transistor. The plurality of first transistors is disposed in the side region and the at least one second transistor is disposed in the display region.

A device includes a main capacitor composed of a first plate of a first back-end-of-line (BEOL) metallization layer, a main insulator layer on the first plate, and a second plate on the main insulator layer. The second plate is composed of a second BEOL metallization layer. The device includes a first tuning capacitor of a first portion of a first BEOL interconnect trace coupled to the first plate of the main capacitor through first BEOL sideline traces. The first tuning capacitor is composed of a first insulator layer on a surface and sidewalls of the first portion of the first BEOL interconnect trace. The first tuning capacitor includes a second BEOL interconnect trace on a surface and sidewalls of the first insulator layer. The device includes a first via capture pad coupled to the second BEOL interconnect trace of the first tuning capacitor.

A display device has a display region and a side region adjacent to the display region. The display device includes a plurality of display units, a plurality of sensing units, a display driver and a sensor driving unit. The plurality of display units are disposed on a first substrate. The plurality of sensing units correspond to the plurality of display units. The plurality of display units and the plurality of sensing units are disposed in the display region. The display driver is coupled to at least a portion of the plurality of display units, and includes a plurality of first transistors. The sensor driving unit is coupled to at least a portion of the plurality of sensing units, and includes at least one second transistor. The plurality of first transistors is disposed in the side region and the at least one second transistor is disposed in the display region.

A method includes obtaining sensor data associated with a deposition process performed in a process chamber to deposit film on a surface of a substrate. The method further includes generating a plurality of physics based outputs using a transformation function and the sensor data. The method further includes mapping the physics based outputs to a training set. The method further includes training a virtual model based on the training set and the sensor data, wherein the virtual model is trained to generate predictive metrology data associated with the film.

A device includes a main capacitor composed of a first plate of a first back-end-of-line (BEOL) metallization layer, a main insulator layer on the first plate, and a second plate on the main insulator layer. The second plate is composed of a second BEOL metallization layer. The device includes a first tuning capacitor of a first portion of a first BEOL interconnect trace coupled to the first plate of the main capacitor through first BEOL sideline traces. The first tuning capacitor is composed of a first insulator layer on a surface and sidewalls of the first portion of the first BEOL interconnect trace. The first tuning capacitor includes a second BEOL interconnect trace on a surface and sidewalls of the first insulator layer. The device includes a first via capture pad coupled to the second BEOL interconnect trace of the first tuning capacitor.

A display device has a display region and a side region adjacent to the display region and includes a plurality of display units, a plurality of sensing units, a display driver and a sensor driver. The plurality of display units and the plurality of sensing units are disposed in the display region. The display driver is coupled to at least a portion of the plurality of display units, and includes a plurality of first thin-film transistors having a first channel layer. The sensor driver is coupled to at least a portion of the plurality of sensing units, and includes a plurality of second thin-film transistors having a second channel layer. At least a portion of the plurality of first thin-film transistors and at least a portion of the plurality of second thin-film transistors are disposed in the side region.

A display device has a display region and a side region adjacent to the display region and includes a plurality of display units, a plurality of sensing units, a display driver and a sensor driver. The plurality of display units and the plurality of sensing units are disposed in the display region. The display driver is coupled to at least a portion of the plurality of display units, and includes a plurality of first thin-film transistors having a first channel layer. The sensor driver is coupled to at least a portion of the plurality of sensing units, and includes a plurality of second thin-film transistors having a second channel layer. At least a portion of the plurality of first thin-film transistors and at least a portion of the plurality of second thin-film transistors are disposed in the side region.

A method includes obtaining sensor data associated with a deposition process performed in a process chamber to deposit film on a surface of a substrate. The method further includes generating a plurality of physics based outputs using a transformation function and the sensor data. The method further includes mapping the physics based outputs to a training set. The method further includes training a virtual model based on the training set and the sensor data, wherein the virtual model is trained to generate predictive metrology data associated with the film.

A high performance integrated tunable impedance matching network with coupled merged inductors. Embodiments include a combination of merged multiport constructively coupled spiral inductors and tunable capacitors configured to reduce insertion losses, circuit size, and optimization time while maintaining a high Q factor for the coupled spiral inductors. Some embodiments integrate one or more filter circuits with a tunable impedance matching network, useful in conjunction with such applications as radio frequency power amplifiers.