A semiconductor structure includes a porous semiconductor segment adjacent to a first region of a substrate, and a crystalline epitaxial layer situated over the porous semiconductor segment and over the first region of the substrate. A first semiconductor device is situated in the crystalline epitaxial layer over the porous semiconductor segment. The first region of the substrate has a first dielectric constant, and the porous semiconductor segment has a second dielectric constant that is substantially less than the first dielectric constant such that the porous semiconductor segment reduces signal leakage from the first semiconductor device. The semiconductor structure can include a second semiconductor device situated in the crystalline epitaxial layer over the first region of the substrate, and an electrical isolation region separating the first and second semiconductor devices.

A semiconductor structure includes a substrate having a first dielectric constant, a porous semiconductor layer situated over the substrate, and a crystalline epitaxial layer situated over the porous semiconductor layer. A first semiconductor device is situated in the crystalline epitaxial layer. The porous semiconductor layer has a second dielectric constant that is substantially less than the first dielectric constant such that the porous semiconductor layer reduces signal leakage from the first semiconductor device. The semiconductor structure can include a second semiconductor device situated in the crystalline epitaxial layer, and an electrical isolation region separating the first and second semiconductor devices.

A semiconductor structure includes a substrate having a first dielectric constant, a porous semiconductor layer situated over the substrate, and a crystalline epitaxial layer situated over the porous semiconductor layer. A first semiconductor device is situated in the crystalline epitaxial layer. The porous semiconductor layer has a second dielectric constant that is substantially less than the first dielectric constant such that the porous semiconductor layer reduces signal leakage from the first semiconductor device. The semiconductor structure can include a second semiconductor device situated in the crystalline epitaxial layer, and an electrical isolation region separating the first and second semiconductor devices.

A semiconductor structure includes a porous semiconductor segment adjacent to a first region of a substrate, and a crystalline epitaxial layer situated over the porous semiconductor segment and over the first region of the substrate. A first semiconductor device is situated in the crystalline epitaxial layer over the porous semiconductor segment. The first region of the substrate has a first dielectric constant, and the porous semiconductor segment has a second dielectric constant that is substantially less than the first dielectric constant such that the porous semiconductor segment reduces signal leakage from the first semiconductor device. The semiconductor structure can include a second semiconductor device situated in the crystalline epitaxial layer over the first region of the substrate, and an electrical isolation region separating the first and second semiconductor devices.

A semiconductor structure includes a substrate having a first dielectric constant, a porous semiconductor layer situated over the substrate, and a crystalline epitaxial layer situated over the porous semiconductor layer. A first semiconductor device is situated in the crystalline epitaxial layer. The porous semiconductor layer has a second dielectric constant that is substantially less than the first dielectric constant such that the porous semiconductor layer reduces signal leakage from the first semiconductor device. The semiconductor structure can include a second semiconductor device situated in the crystalline epitaxial layer, and an electrical isolation region separating the first and second semiconductor devices.

The present disclosure relates to a dielectrically isolated semiconductor device and a method for manufacturing the same. The dielectrically isolated semiconductor device includes a semiconductor substrate, a first semiconductor layer above the semiconductor substrate, a second semiconductor layer above the first semiconductor layer, a semiconductor island in the second semiconductor layer, and a first dielectric isolation layer surrounding a bottom and sidewalls of the semiconductor island. The first dielectric isolation layer includes a first portion which is formed from a portion of the first semiconductor layer and extending along the bottom of the semiconductor island, and a second portion which is formed from a portion of the second semiconductor layer and extending along the sidewalls of the semiconductor island. The dielectrically isolated semiconductor devices needs no an SOI wafer and reduces manufacturing cost.

A single crystal semiconductor handle substrate for use in the manufacture of semiconductor-on-insulator (e.g., silicon-on-insulator (SOI)) structure is etched to form a porous layer in the front surface region of the wafer. The etched region is oxidized and then filled with a semiconductor material, which may be polycrystalline or amorphous. The surface is polished to render it bondable to a semiconductor donor substrate. Layer transfer is performed over the polished surface thus creating semiconductor-on-insulator (e.g., silicon-on-insulator (SOI)) structure having 4 layers: the handle substrate, the composite layer comprising filled pores, a dielectric layer (e.g., buried oxide), and a device layer. The structure can be used as initial substrate in fabricating radiofrequency chips. The resulting chips have suppressed parasitic effects, particularly, no induced conductive channel below the buried oxide.

A single crystal semiconductor handle substrate for use in the manufacture of semiconductor-on-insulator (e.g., silicon-on-insulator (SOI)) structure is etched to form a porous layer in the front surface region of the wafer. The etched region is oxidized and then filled with a semiconductor material, which may be polycrystalline or amorphous. The surface is polished to render it bondable to a semiconductor donor substrate. Layer transfer is performed over the polished surface thus creating semiconductor-on-insulator (e.g., silicon-on-insulator (SOI)) structure having 4 layers: the handle substrate, the composite layer comprising filled pores, a dielectric layer (e.g., buried oxide), and a device layer. The structure can be used as initial substrate in fabricating radiofrequency chips. The resulting chips have suppressed parasitic effects, particularly, no induced conductive channel below the buried oxide.

The present disclosure relates to a dielectrically isolated semiconductor device and a method for manufacturing the same. The dielectrically isolated semiconductor device includes a semiconductor substrate, a first semiconductor layer above the semiconductor substrate, a second semiconductor layer above the first semiconductor layer, a semiconductor island in the second semiconductor layer, and a first dielectric isolation layer surrounding a bottom and sidewalls of the semiconductor island. The first dielectric isolation layer includes a first portion which is formed from a portion of the first semiconductor layer and extending along the bottom of the semiconductor island, and a second portion which is formed from a portion of the second semiconductor layer and extending along the sidewalls of the semiconductor island. The dielectrically isolated semiconductor devices needs no an SOI wafer and reduces manufacturing cost.