The present disclosure provides an electronic device and a manufacturing method thereof. The electronic device includes a connecting element. The connecting element includes a first conductive line segment, a second conductive line segment, and a first connecting line segment. The first conductive line segment is electrically connected to the second conductive line segment through the first connecting line segment. In a vertical projection direction, the first connecting line segment has a first height, the first conductive line segment has a second height, and the first height is different from the second height.

Self-repair logic for stacked memory architecture. An embodiment of a memory device includes a memory stack having one or more memory die elements, including a first memory die element, and a system element coupled with the memory stack. The first memory die element includes multiple through silicon vias (TSVs), the TSVs including data TSVs and one or more spare TSVs, and self-repair logic to repair operation of a defective TSV of the plurality of data TSVs, the repair of operation of the defective TSV including utilization of the one or more spare TSVs.

A die bonding method includes obtaining information about a quality grade of each die of a plurality of dies placed at a wafer, picking up a first die among the plurality of dies from the wafer, identifying a bonding location of a plurality of bonding locations from a substrate according to a quality grade of the first die, and bonding the first die to the bonding location of the substrate.

A display device includes a substrate including a plurality of emission areas respectively corresponding to a plurality of subpixels for displaying an image, a plurality of light emitting elements respectively located in the plurality of emission areas of a first surface of the substrate and respectively corresponding to the plurality of subpixels, a first planarization layer on the first surface of the substrate and covering the plurality of light emitting elements, and an array layer on the first planarization layer.

A display device is provided in an embodiment in the disclosure, including a subpixel region, a spacer, a light-emitting element, and a driving circuit. The spacer separates the subpixel region into a first region and a second region. The light-emitting element is located in at least one of the first region or the second region. The driving circuit is electrically connected to the first region and the second region, so as to drive the light-emitting element. A manufacturing method of the display device is also disclosed.

A display including a base, a plurality of pixels disposed on the base, at least one of the pixels including a first interconnect and a plurality of second interconnects, and a plurality of mounting portions on which a plurality of sub-pixels is to be mounted, in which a first portion of at least one the plurality of mounting portions is electrically connected to the first interconnect, a second portion of at least one of the plurality of mounting portions is electrically connected to one of the second interconnects, and at least one of the plurality of sub-pixels mounted on the plurality of mounting portions is configured to emit light of different wavelength.

A display panel includes gate lines, data lines, switching elements connected to the gate lines and the data lines, pixel electrodes connected to the switching elements and markers. The pixel electrode includes first, second third and fourth areas which are divided by a horizontal central line and a vertical central line. The first, second, third and fourth areas correspond to an upper-left portion, an upper-right portion, a lower-left portion and a lower-right portion of a central point of the pixel electrode. When the pixel electrode is disposed between first and second data lines and connected to the first data line, the marker is disposed in one of the first and third areas. When the pixel electrode is disposed between the first and second data lines and connected to the second data line, the marker is disposed in one of the second and fourth areas.

A method of fabricating a device involves forming a plurality of structures, such that each structure of the plurality includes a substrate and an epitaxial layer on the substrate. The epitaxial layer and the substrate have a lattice mismatch. The method further includes forming an electrical contact on the epitaxial layer of a selected structure of the plurality of structures and performing a current leakage measurement quality control test for the selected structure of the plurality of structures through the electrical contact. The method also involves forming a device on each of the remaining structures of the plurality of structures if the selected structure passed the leakage measurement quality control test or discarding each of the remaining structures of the plurality of structures if the selected structure did not pass the leakage measurement quality control test.

A method of evaluating metal contamination by measuring the amount of metal contaminants to a silicon wafer in a rapid thermal processing apparatus includes steps of obtaining a Si single crystal grown by the Czochralski method at a pulling rate of 1.0 mm/min or lower, the crystal having oxygen concentration of 1.3×10.sup.18 atoms/cm.sup.3 or less, slicing silicon wafers from the Si single crystal except regions of 40 mm toward the central portion from the head of the single crystal and 40 mm toward the central portion from the tail, heat-treating the silicon wafer with a rapid thermal processing apparatus and transferring contaminants from members in a furnace of the rapid thermal processing apparatus to the silicon wafer, and measuring a lifetime of the silicon wafer to which contaminants are transferred.

A method for repairing a display device, the display device including a plurality of inorganic light emitting elements arranged in a matrix and an insulator arranged around the plurality of inorganic light emitting elements, the method comprising steps of: detecting a defective inorganic light emitting element as the inorganic light emitting element having a defect; removing the insulator around the defective inorganic light emitting element while the defective inorganic light emitting element remains without being removed by irradiating the insulator around the defective inorganic light emitting element with irradiation light; and removing the defective inorganic light emitting element after the insulator therearound has been removed.