Disclosed are an electrical connection method for an electronic element, and a backlight module, a display panel, and a display apparatus which include an electronic element to which the electrical connection method is applied. The electrical connection method comprises: providing a driving back plane, wherein the driving back plane comprises multiple contact electrodes; forming an anti-oxidation protection film on the contact electrodes; coating a position of the anti-oxidation protection film corresponding to each contact electrode with a binding material; and transferring multiple electronic elements to the positions of the corresponding contact electrodes, binding each electronic element to the corresponding contact electrode, and removing the anti-oxidation protection film at the position of each contact electrode before completing the binding of each electronic element to the corresponding contact electrode.

A semiconductor package element includes a die, a passive layer, a conductive structure and an encapsulation layer. The die includes a first surface, a second surface and a third surface. The second surface is opposite to the first surface. The third surface is connected between the first surface and the second surface. The passive layer is disposed on the first surface and formed with a hole. The conductive structure is electrically coupled to the die through the hole. The encapsulation layer covers the first surface and the third surface of the die, wherein the passive layer is embedded in the encapsulation layer, a portion of the conductive structure is embedded in the encapsulation layer, and the other portion of the conductive structure protrudes from an etched surface of the encapsulation layer, the etched surface is formed by plasma etching.

A semiconductor device includes a first die embedded in a molding material, where contact pads of the first die are proximate a first side of the molding material. The semiconductor device further includes a redistribution structure over the first side of the molding material, a first metal coating along sidewalls of the first die and between the first die and the molding material, and a second metal coating along sidewalls of the molding material and on a second side of the molding material opposing the first side.

A semiconductor device includes a first die embedded in a molding material, where contact pads of the first die are proximate a first side of the molding material. The semiconductor device further includes a redistribution structure over the first side of the molding material, a first metal coating along sidewalls of the first die and between the first die and the molding material, and a second metal coating along sidewalls of the molding material and on a second side of the molding material opposing the first side.

A package comprising a substrate and an integrated device coupled to the substrate through a plurality of pillar interconnects and a plurality of solder interconnects. The plurality of pillar interconnects includes a first pillar interconnect comprising a first cavity. The plurality of solder interconnects comprises a first solder interconnect located in the first cavity of the first pillar interconnect. A planar cross section that extends through the first cavity of the first pillar interconnect may comprise an O shape. The first pillar interconnect comprises a first pillar interconnect portion comprising a first width; and a second pillar interconnect portion comprising a second width that is different than the first width.

A package comprising a substrate and an integrated device coupled to the substrate through a plurality of pillar interconnects and a plurality of solder interconnects. The plurality of pillar interconnects includes a first pillar interconnect comprising a first cavity. The plurality of solder interconnects comprises a first solder interconnect located in the first cavity of the first pillar interconnect. A planar cross section that extends through the first cavity of the first pillar interconnect may comprise an O shape. The first pillar interconnect comprises a first pillar interconnect portion comprising a first width; and a second pillar interconnect portion comprising a second width that is different than the first width.

A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.

In an embodiment, a device includes: a back-side redistribution structure including: a metallization pattern on a first dielectric layer; and a second dielectric layer on the metallization pattern; a through via extending through the first dielectric layer to contact the metallization pattern; an integrated circuit die adjacent the through via on the first dielectric layer; a molding compound on the first dielectric layer, the molding compound encapsulating the through via and the integrated circuit die; a conductive connector extending through the second dielectric layer to contact the metallization pattern, the conductive connector being electrically connected to the through via; and an intermetallic compound at the interface of the conductive connector and the metallization pattern, the intermetallic compound extending only partially into the metallization pattern.

In an embodiment, a device includes: a back-side redistribution structure including: a metallization pattern on a first dielectric layer; and a second dielectric layer on the metallization pattern; a through via extending through the first dielectric layer to contact the metallization pattern; an integrated circuit die adjacent the through via on the first dielectric layer; a molding compound on the first dielectric layer, the molding compound encapsulating the through via and the integrated circuit die; a conductive connector extending through the second dielectric layer to contact the metallization pattern, the conductive connector being electrically connected to the through via; and an intermetallic compound at the interface of the conductive connector and the metallization pattern, the intermetallic compound extending only partially into the metallization pattern.

In an embodiment, a method for manufacturing and passivating a die includes providing the die having an active frontside including a protrusion, the protrusion configured for electrically contacting the die, covering a portion of the protrusion by a passivation tape before applying a passivation layer, applying the passivation layer on all sides of the die including the frontside and its protrusion in one single process, except on the portion covered by the passivation tape and detaching the passivation tape from the covered portion of the protrusion after applying the passivation layer to expose the portion of the protrusion which forms an electrical contact area.