Patent classifications
H01L2224/132
Methods for forming pillar bumps on semiconductor wafers
The subject matter contained herein discloses methods for forming a vertical metallic pillar overlying an under bump metal pad further overlying a semiconductor substrate, and applying a discrete solder cap on a top surface of the pillar, wherein the metallic pillar is defined by at least one photoresist layer. The method includes heating a multi-element metallic paste containing a variable amount of metallic powder, a melting point depressant and a flux such that the metal powder sinters to form the metallic pillar and simultaneously adheres the metallic pillar to the underbump metal pad.
Methods for forming pillar bumps on semiconductor wafers
The subject matter contained herein discloses methods for forming a vertical metallic pillar overlying an under bump metal pad further overlying a semiconductor substrate, and applying a discrete solder cap on a top surface of the pillar, wherein the metallic pillar is defined by at least one photoresist layer. The method includes heating a multi-element metallic paste containing a variable amount of metallic powder, a melting point depressant and a flux such that the metal powder sinters to form the metallic pillar and simultaneously adheres the metallic pillar to the underbump metal pad.
MEMS device stress-reducing structure
A MEMS device is disclosed. In an embodiment a MEMS device includes a substrate having an active region and at least one integrated electrical and mechanical connection element configured to electrically and mechanically mount the MEMS device to a carrier, wherein the connection element comprises a stress-reducing structure.
MEMS device stress-reducing structure
A MEMS device is disclosed. In an embodiment a MEMS device includes a substrate having an active region and at least one integrated electrical and mechanical connection element configured to electrically and mechanically mount the MEMS device to a carrier, wherein the connection element comprises a stress-reducing structure.
Semiconductor package having magnetic interconnects and related methods
Implementations of semiconductor packages may include a first die including a plurality of contact pads, a second die including a plurality of contact pads, a plurality of solder interconnects bonding the plurality of contact pads of the first die to the plurality of contact pads of the second die, and a plurality of magnetic particles each coated in an oxide included in each of the plurality of solder interconnects.
Semiconductor package having magnetic interconnects and related methods
Implementations of semiconductor packages may include a first die including a plurality of contact pads, a second die including a plurality of contact pads, a plurality of solder interconnects bonding the plurality of contact pads of the first die to the plurality of contact pads of the second die, and a plurality of magnetic particles each coated in an oxide included in each of the plurality of solder interconnects.
SEMICONDUCTOR PACKAGE HAVING MAGNETIC INTERCONNECTS AND RELATED METHODS
Implementations of semiconductor packages may include a first die including a plurality of contact pads, a second die including a plurality of contact pads, a plurality of solder interconnects bonding the plurality of contact pads of the first die to the plurality of contact pads of the second die, and a plurality of magnetic particles each coated in an oxide included in each of the plurality of solder interconnects.
SEMICONDUCTOR PACKAGE HAVING MAGNETIC INTERCONNECTS AND RELATED METHODS
Implementations of semiconductor packages may include a first die including a plurality of contact pads, a second die including a plurality of contact pads, a plurality of solder interconnects bonding the plurality of contact pads of the first die to the plurality of contact pads of the second die, and a plurality of magnetic particles each coated in an oxide included in each of the plurality of solder interconnects.
MEMS Device
A MEMS device is disclosed. In an embodiment a MEMS device includes a substrate having an active region and at least one integrated electrical and mechanical connection element configured to electrically and mechanically mount the MEMS device to a carrier, wherein the connection element comprises a stress-reducing structure.
MEMS Device
A MEMS device is disclosed. In an embodiment a MEMS device includes a substrate having an active region and at least one integrated electrical and mechanical connection element configured to electrically and mechanically mount the MEMS device to a carrier, wherein the connection element comprises a stress-reducing structure.