A contact pad includes a solder-wettable porous network (310) which wicks the molten solder (130) and thus restricts the lateral spread of the solder, thus preventing solder bridging between adjacent contact pads.

In a described example, a packaged device includes a substrate having a device mounting surface with conductive lands having a first thickness spaced from one another on the device mounting surface. A first polymer layer is disposed on the device mounting surface between the conductive lands having a second thickness equal to the first thickness. The conductive lands have an outer surface not covered by the first polymer layer. A second polymer layer is disposed on the first polymer layer, the outer surface of the conductive lands not covered by the second polymer layer. Conductive nanoparticle material is disposed on the outer surface of the conductive lands. A third polymer layer is disposed on the second polymer layer between the conductive nanoparticle material on the conductive lands. At least one semiconductor device die is mounted to the third polymer layer having electrical terminals bonded to the conductive nanoparticle material.

In a described example, a packaged device includes a substrate having a device mounting surface with conductive lands having a first thickness spaced from one another on the device mounting surface. A first polymer layer is disposed on the device mounting surface between the conductive lands having a second thickness equal to the first thickness. The conductive lands have an outer surface not covered by the first polymer layer. A second polymer layer is disposed on the first polymer layer, the outer surface of the conductive lands not covered by the second polymer layer. Conductive nanoparticle material is disposed on the outer surface of the conductive lands. A third polymer layer is disposed on the second polymer layer between the conductive nanoparticle material on the conductive lands. At least one semiconductor device die is mounted to the third polymer layer having electrical terminals bonded to the conductive nanoparticle material.

A contact pad includes a solder-wettable porous network (310) which wicks the molten solder (130) and thus restricts the lateral spread of the solder, thus preventing solder bridging between adjacent contact pads.

A contact pad includes a solder-wettable porous network (310) which wicks the molten solder (130) and thus restricts the lateral spread of the solder, thus preventing solder bridging between adjacent contact pads.

A semiconductor package includes a processor die (e.g., an SoC) and one or more memory die (e.g., DRAM) coupled to a ball grid array (BGA) substrate. The processor die and the memory die are coupled to opposite sides of the BGA substrate using terminals (e.g., solder balls). The package may be coupled to a printed circuit board (PCB) using one or more terminals positioned around the perimeter of the processor die. The PCB may include a recess with at least part of the processor die being positioned in the recess. Positioning at least part of the processor die in the recess reduces the overall height of the semiconductor package assembly. A voltage regulator may also be coupled to the BGA substrate on the same side as the processor die with at least part of the voltage regulator being positioned in the recess a few millimeters from the processor die.

A semiconductor package includes a processor die (e.g., an SoC) and one or more memory die (e.g., DRAM) coupled to a ball grid array (BGA) substrate. The processor die and the memory die are coupled to opposite sides of the BGA substrate using terminals (e.g., solder balls). The package may be coupled to a printed circuit board (PCB) using one or more terminals positioned around the perimeter of the processor die. The PCB may include a recess with at least part of the processor die being positioned in the recess. Positioning at least part of the processor die in the recess reduces the overall height of the semiconductor package assembly. A voltage regulator may also be coupled to the BGA substrate on the same side as the processor die with at least part of the voltage regulator being positioned in the recess a few millimeters from the processor die.

A semiconductor package substrate includes an insulating substrate, a circuit pattern on the insulating substrate, a protective layer formed on the insulating substrate to cover the circuit pattern on the insulating substrate, a pad formed on the protective layer while protruding from a surface of the protective layer, and an adhesive member on the pad.

A semiconductor package substrate includes an insulating substrate, a circuit pattern on the insulating substrate, a protective layer formed on the insulating substrate to cover the circuit pattern on the insulating substrate, a pad formed on the protective layer while protruding from a surface of the protective layer, and an adhesive member on the pad.

A contact pad includes a solder-wettable porous network (310) which wicks the molten solder (130) and thus restricts the lateral spread of the solder, thus preventing solder bridging between adjacent contact pads.