Patent classifications
H
ELECTRICITY
Load children
H01
ELECTRIC ELEMENTS
Load children
H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
Load children
2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/10
Bump connectors; Manufacturing methods related thereto
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/12
Structure, shape, material or disposition of the bump connectors prior to the connecting process
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/13
of an individual bump connector
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/136
with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/13663
the principal constituent melting at a temperature of greater than 1550°C
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/1367
Zirconium [Zr] as principal constituent
Filter patents View analytics View as hierarchy Open in page

H01L2224/1367

MANUFACTURING METHOD OF AN ELECTRONIC APPARATUS
20220328448 · 2022-10-13 · ·

A manufacturing method of an electronic apparatus is provided, and the manufacturing method includes following steps. A substrate is provided. A plurality of first bonding pads are formed on the substrate. A plurality of electronic devices are provided, and each of the electronic devices includes at least one second bonding pad. The second bonding pads of the electronic devices corresponding to the first bonding pads are laminated onto the corresponding first bonding pads on the substrate, so as to bond the electronic devices to the substrate. The corresponding first and second bonding pads respectively have bonding surfaces with different surface topographies. The manufacturing method of the electronic apparatus is capable of reducing short circuit during a bonding process or improving a bonding yield.

MANUFACTURING METHOD OF AN ELECTRONIC APPARATUS
20220328448 · 2022-10-13 · ·

A manufacturing method of an electronic apparatus is provided, and the manufacturing method includes following steps. A substrate is provided. A plurality of first bonding pads are formed on the substrate. A plurality of electronic devices are provided, and each of the electronic devices includes at least one second bonding pad. The second bonding pads of the electronic devices corresponding to the first bonding pads are laminated onto the corresponding first bonding pads on the substrate, so as to bond the electronic devices to the substrate. The corresponding first and second bonding pads respectively have bonding surfaces with different surface topographies. The manufacturing method of the electronic apparatus is capable of reducing short circuit during a bonding process or improving a bonding yield.

Semiconductor packages
09698088 · 2017-07-04 · ·

Semiconductor packages include a first substrate including a central portion and a peripheral portion, at least one first central connection member attached to the central portion of the first substrate, and at least one first peripheral connection member attached to the peripheral portion of the first substrate. The first central connection member includes a first supporter and a first fusion conductive layer surrounding the first supporter.

Semiconductor packages
09698088 · 2017-07-04 · ·

Semiconductor packages include a first substrate including a central portion and a peripheral portion, at least one first central connection member attached to the central portion of the first substrate, and at least one first peripheral connection member attached to the peripheral portion of the first substrate. The first central connection member includes a first supporter and a first fusion conductive layer surrounding the first supporter.