A semiconductor package includes a first base plate, first semiconductor structure, second base plate and filling layer. The first base plate has a first surface including first and second signal transmission regions. The first semiconductor structure located on the first surface is electrically connected to the first signal transmission region. The second base plate located on the first base plate includes a base and a first interconnection surface. The first interconnection surface is away from the first surface. The first interconnection surface has first and second interconnection regions communicated with each other. The first interconnection region is electrically connected to the second signal transmission region. The filling layer seals the first semiconductor structure, second base plate and first surface. The first interconnection region is not sealed, and the second interconnection region is. There is a preset height between a top surface of the filling layer and the first interconnection region.

A semiconductor device includes first and second conductive parts, a first bonding wire connecting the first and second conductive parts and having a non-flat portion between opposite ends thereof so that a portion between the opposite ends is away from the first and second conductive parts, a case having a housing space to accommodate the first and second conductive parts, including a sidewall having first to fourth lateral faces surrounding the housing space to form a rectangular shape in a plan view, and a cover disposed on the sidewall, a sealing member filling the case to seal the first bonding wire, and a first stress relaxer for relieving a stress in the first bonding wire. The first bonding wire extends from the second lateral face toward the fourth lateral face, and the first stress relaxer is positioned between the first bonding wire and the first lateral face.

The present disclosure includes: a base plate having a shape of a sheet; a relay plate having a shape of a sheet; a terminal member; and an electronic component joined to one surface of the base plate. The base plate, the relay plate, and the terminal member are electrically conductive members and arranged on a same plane with gaps between the electrically conductive members. The electronic component and one surface of the relay plate are connected to each other by a bonding wire. The one surface of the relay plate and one surface of the terminal member are connected to each other by a bonding wire.

A semiconductor device includes a mounting substrate having a first surface, a semiconductor chip mounted on the first surface and having a second surface facing a side opposite to the first surface, and a wire extending from a first joint point on the first surface toward a second joint point on the second surface and electrically connecting the mounting substrate and the semiconductor chip to each other by connecting the first joint point and the second joint point to each other. The wire includes a first part, a first bent portion, a second part, a second bent portion, and a third part arranged in order from the first joint point toward the second joint point. The first part is positioned on the first surface side with respect to the second surface when viewed in a first direction along the first surface and the second surface.

A wire bonding apparatus connecting a lead of a mounted member with an electrode of a semiconductor die through a wire comprises a capillary through which the wire is inserted, a shape acquisition part which acquires the shape of the lead to which the wire is connected, a calculating part which calculates an extending direction of a wire tail extending from the end of the capillary based on the shape of a lead to which the wire is connected next, and a cutting part which moves the capillary in the extending direction and cuts the wire to form the wire tail after the lead is connected with the electrode through the wire. Thus, in the wire bonding using wedge bonding, joining part tails (183a, 283a, 383a) formed in continuation to a first bonding point can be prevented from coming into contact with each other.

Implementations of a semiconductor package system may include a first bond wire bonded to a portion of a leadframe and to a pad of a semiconductor die, the first bond wire coupled to one of a power source or a ground; and a second bond wire bonded to the portion of the leadframe and to a control integrated circuit. The portion of the leadframe may form a current sense area and the control integrated circuit may be configured to use the second bond wire and the current sense area to measure a current flowing through the first bond wire during operation.

An electronic device and associated methods are disclosed. In one example, the electronic device includes one or more ribbon bond connections along with one or more wire bond connections. In one example, ribbon bond connections are shown, and are coupled to ground, and configured to provide a shielding effect to wire bond connections.

A semiconductor device according to the embodiment includes: a frame body having a wall surface; an insulating substrate surrounded by the frame body, the insulating substrate having a first metal layer and a second metal layer on a surface, the second metal layer being located between the first metal layer and the wall surface; a semiconductor chip including an electrode and provided on the first metal layer; and a bonding wire having a first bond portion connected to the electrode, a second bond portion connected to the second metal layer, and an intermediate portion between the first bond portion and the second bond portion; wherein a second angle formed between a second direction in which the second bond portion extends and the wall surface is smaller than a first angle formed between a first direction in which the intermediate portion extends and the wall surface.

Implementations of a semiconductor package system may include a first bond wire bonded to a portion of a leadframe and to a pad of a semiconductor die, the first bond wire coupled to one of a power source or a ground; and a second bond wire bonded to the portion of the leadframe and to a control integrated circuit. The portion of the leadframe may form a current sense area and the control integrated circuit may be configured to use the second bond wire and the current sense area to measure a current flowing through the first bond wire during operation.

A semiconductor device includes a semiconductor element, a conductive layer, terminals, and a sealing resin. The conductive layer, containing metal particles, is in contact with the reverse surface and the side surface of the semiconductor element. The terminals are spaced apart from and electrically connected to the semiconductor element. The sealing resin covers the semiconductor element. The conductive layer has an edge located outside of the semiconductor element as viewed in plan. Each terminal includes a top surface, a bottom surface, an inner side surface held in contact with the sealing resin, and the terminal is formed with a dent portion recessed from the bottom surface and the inner side surface. The conductive layer and the bottom surface of each terminal are exposed from a bottom surface of the sealing resin.