H01L2224/48253

Multi-row QFN semiconductor package
11264309 · 2022-03-01 · ·

A semiconductor package includes at least one die attach pad of a leadframe, at least one semiconductor die mounted on the at least one die attach pad; and a plurality of lead terminals disposed around the at least one die attach pad and electrically connected to respective input/output (I/O) pads on the at least one semiconductor die through a plurality of bond wires. The plurality of lead terminals comprises first lead terminals, second lead terminals, and third lead terminals, which are arranged in triple row configuration along at least one side of the semiconductor package. Each of the first lead terminals, second lead terminals, and third lead terminals has an exposed base metal on a cut end thereof.

Transistor outline housing with high return loss

A transistor outline housing is provided that includes a header for an optoelectronic component. The header has electrical feedthroughs in the form of connection pins embedded in a potting compound. The header has a recess in which at least one of the connection pins in one of the feedthroughs extends out of the lower surface of the header.

MULTI-ROW QFN SEMICONDUCTOR PACKAGE
20200402893 · 2020-12-24 ·

A semiconductor package includes at least one die attach pad of a leadframe, at least one semiconductor die mounted on the at least one die attach pad; and a plurality of lead terminals disposed around the at least one die attach pad and electrically connected to respective input/output (I/O) pads on the at least one semiconductor die through a plurality of bond wires. The plurality of lead terminals comprises first lead terminals, second lead terminals, and third lead terminals, which are arranged in triple row configuration along at least one side of the semiconductor package. Each of the first lead terminals, second lead terminals, and third lead terminals has an exposed base metal on a cut end thereof.

Semiconductor device

In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.

TRANSISTOR OUTLINE HOUSING WITH HIGH RETURN LOSS

A transistor outline housing is provided that includes a header for an optoelectronic component. The header has electrical feedthroughs in the form of connection pins embedded in a potting compound. The header has a recess in which at least one of the connection pins in one of the feedthroughs extends out of the lower surface of the header.

Semiconductor device with first and second chips and connections thereof and a manufacturing method of the same

In a non-insulated DC-DC converter having a circuit in which a power MOSFET high-side switch and a power MOSFET low-side switch are connected in series, the power MOSFET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOSFET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOSFET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.

SEMICONDUCTOR DEVICE
20190027427 · 2019-01-24 ·

In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.

Semiconductor device

In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package.

WIRING SYSTEM

A method for attaching a prefabricated miniature coaxial wire to a first electrical connection point, the prefabricated miniature coaxial wire having an electrically conductive core disposed within an electrical insulation layer disposed within an electrically conductive shield layer, includes attaching an exposed portion of the electrically conductive core at a distal end of the prefabricated miniature coaxial wire to the first electrical connection point, thereby establishing electrical conductivity between the electrically conductive core and the first electrical connection point, depositing a layer of electrically insulating material onto the exposed portion of the electrically conductive core such that the exposed portion of the electrically conductive core and the first electrical connection point is encased in the layer of electrically insulating material, and connecting the electrically conductive shield layer to a second electrical connection point using a connector formed from an electrically conductive material.

SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD OF THE SAME
20170373055 · 2017-12-28 ·

In a non-insulated DC-DC converter having a circuit in which a power MOSFET high-side switch and a power MOSFET low-side switch are connected in series, the power MOSFET low-side switch and a Schottky barrier diode to be connected in parallel with the power MOSFET low-side switch are formed within one semiconductor chip. The formation region SDR of the Schottky barrier diode is disposed in the center in the shorter direction of the semiconductor chip, and on both sides thereof, the formation regions of the power MOSFET low-side switch are disposed. From the gate finger in the vicinity of both long sides on the main surface of the semiconductor chip toward the formation region SDR of the Schottky barrier diode, a plurality of gate fingers are disposed so as to interpose the formation region SDR between them.