A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.

Methods, systems, and apparatuses for preventing corrosion between dissimilar bonded metals. The method includes providing a wafer having a plurality of circuits, each of the plurality of circuits having a plurality of bond pads including a first metal; applying a coating onto at least the plurality of bond pads; etching a hole in the coating on each of the plurality of bond pads to provide an exposed portion of the plurality of bond pads; dicing the wafer to separate each of the plurality of circuits; die bonding each of the plurality of circuits to a respective packaging substrate; and performing a bonding process to bond a second, dissimilar metal to the exposed portion of each of the plurality of bond pads such that the second, dissimilar metal encloses the hole in the coating of each of the plurality of bond pads, thereby enclosing the exposed portion.

A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal moulded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal moulded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal moulded body. The forming of the power semiconductor contact structure is performed firstly by applying a layer of sintering material of locally varying thickness to either the metal moulded body 2 or the substrate, followed by sintering together the contacting film 5 with the substrate 1 by using the properties of the layer of sintering material that are conducive to connection, the contacting film 5 being made to develop its distinct form to correspond to the varying thickness of the layer of sintering material 3a.

A power semiconductor contact structure for power semiconductor modules, which has at least one substrate 1 and a metal moulded body 2 as an electrode, which are sintered one on top of the other by means of a substantially uninterrupted sintering layer 3a with regions of varying thickness. The metal moulded body 2 takes the form here of a flexible contacting film 5 of such a thickness that this contacting film is sintered with its side 4 facing the sintering layer 3a onto the regions of varying thickness of the sintering layer substantially over the full surface area. A description is also given of a method for forming a power semiconductor contact structure in a power semiconductor module that has a substrate and a metal moulded body. The forming of the power semiconductor contact structure is performed firstly by applying a layer of sintering material of locally varying thickness to either the metal moulded body 2 or the substrate, followed by sintering together the contacting film 5 with the substrate 1 by using the properties of the layer of sintering material that are conducive to connection, the contacting film 5 being made to develop its distinct form to correspond to the varying thickness of the layer of sintering material 3a.

An electronic device includes: a semiconductor body; a front metallization region; a top buffer region, arranged between the front metallization region and the semiconductor body; and a conductive wire, electrically connected to the front metallization region. The top buffer region is at least partially sintered.

A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.

Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

Various embodiments provide a semiconductor device, including a final metal layer having a top side and at least one sidewall; and a passivation layer disposed over at least part of at least one of the top side and the at least one sidewall of the final metal layer; wherein the passivation layer has a substantially uniform thickness.

A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.

Provided is a Pd coated Cu bonding wire for a semiconductor device capable of sufficiently obtaining bonding reliability of a ball bonded portion in a high temperature environment of 175° C. or more, even when the content of sulfur in the mold resin used in the semiconductor device package increases. The bonding wire for a semiconductor device comprises a Cu alloy core material; and a Pd coating layer formed on a surface of the Cu alloy core material; and contains 0.03 to 2% by mass in total of one or more elements selected from Ni, Rh, Ir and Pd in the bonding wire and further 0.002 to 3% by mass in total of one or more elements selected from Li, Sb, Fe, Cr, Co, Zn, Ca, Mg, Pt, Sc and Y. The bonding wire can be sufficiently obtained bonding reliability of a ball bonded portion in a high temperature environment of 175° C. or more, even when the content of sulfur in the mold resin used in the semiconductor device package increases by being used.