A semiconductor device manufacturing method includes a molding step including disposing a control pin between an inlet and a control wire and on a line connecting the inlet and the control wire in a plan view of the semiconductor device, injecting molding resin raw material into a cavity through the inlet, filling the cavity with the molding resin raw material, and sealing a semiconductor chip and a control element disposed on a main current lead frame and a control lead frame. In this way, the flow velocity of the molding resin raw material flowing to the control wire is reduced.

A semiconductor device includes a substrate, a conductive part, a controller module and a sealing resin. The substrate has a substrate obverse surface and a substrate reverse surface facing away from each other in a z direction. The conductive part is made of an electrically conductive material on the substrate obverse surface. The controller module is disposed on the substrate obverse surface and electrically connected to the conductive part. The sealing resin covers the controller module and at least a portion of the substrate. The conductive part includes an overlapping wiring trace having an overlapping portion overlapping with the electronic component as viewed in the z direction. The overlapping portion of the overlapping wiring trace is not electrically bonded to the controller module.

A semiconductor memory device includes first memory dies stacked one upon another and electrically connected one to another by first bond wires, and covered with a first encapsulant. Second memory dies are disposed above the first memory dies, stacked one upon another and electrically connected one to another with second bond wires, and covered with a second encapsulant. A control die may be mounted on the top die in the second die stack. Vertical bond wires extend between the stacked die modules. A redistribution layer is formed over the top die stack and the control die to allow for electrical communication with the memory device. The memory device allows for stacking memory dies in a manner that allows for increased memory capacity without increasing the package form factor.

The present invention relates to an improved electronic circuit, as well as an improved substrate with electronic circuits, with an identification pattern. The invention makes it possible to make them identifiable and amongst other things to retrace the circuit(s) in this way through the production process. Furthermore, the invention relates to an improved production method for circuits and substrates according to the invention.

In accordance with an embodiment, an electronic circuit includes a first transistor device, at least one second transistor device, and a drive circuit. The first transistor device is integrated in a first semiconductor body, and includes a first load pad at a first surface of the first semiconductor body and a control pad and a second load pad at a second surface of the first semiconductor body. The at least one second transistor device is integrated in a second semiconductor body, and includes a first load pad at a first surface of the second semiconductor body and a control pad and a second load pad at a second surface of the second semiconductor body. The first load pad of the first transistor device and the first load pad of the at least one second transistor device are mounted to an electrically conducting carrier.

A light module has a carrier with a circuit die. On the top side of the carrier, a light-emitting diode die, and a charge store component are electrically connected to the conduction path terminal fields of a transistor by means of die-to-die bondings. The electrical connection between the two dies and the conduction path of the transistor is as short as possible. A terminal field is situated in each case on the top side of the two dies, which terminal fields are connected to one another using a first bonding wire. The charge store component is charged by means of a charging circuit which is electrically connected to the charge store component via a second bonding wire. The second bonding wire is longer than the first bonding wire. The light module may be part of a LIDAR apparatus.

A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a carrier, an element, and a first electronic component. The element is disposed on the carrier. The first electronic component is disposed above the element. The element is configured to adjust a first bandwidth of a first signal transmitted from the first electronic component.

A method of manufacturing a light emitting module is provided. A plurality of light-emitting diodes are aligned on an elongated base board. By a dispenser, an uncured paste of sealing material is continuously applied on a plurality of light-emitting diodes aligned on the elongated base board. The applied paste of sealing material is cured.

An isolation system and isolation device are disclosed. An illustrative isolation device is disclosed to include a transmitter circuit to generate a first current in accordance with a first signal, a first elongated conducting element to generate a magnetic field when the first current flows through the first elongated conducting element, a second elongated conducting element adjacent to the first elongated conducting element so as to receive the magnetic field. The second elongated conducting element is configured to generate an induced current when the magnetic field is received. The receiver circuit is configured to receive the induced current as an input, and configured to generate a reproduced first signal as an output of the receiver circuit.

Evaluation board (EVB) assemblies or stacks utilized in tuning electronic modules are disclosed, as are methods for tuning such modules. In embodiments, the module testing assembly includes an EVB and an EVB baseplate. The EVB includes, in turn, an EVB through-port extending from a first EVB side to a second, opposing EVB side; and a module mount region on the first EVB side and extending about a periphery of the EVB through-port. The module mount region is shaped and sized to accommodate installation of a sample electronic module provided in a partially-completed, pre-encapsulated state fabricated in accordance with a separate thermal path electronic module design. A baseplate through-port combines with the EVB through-port to form a tuning access tunnel providing physical access to circuit components of the sample electronic module through the EVB baseplate from the second EVB side when the sample electronic module is installed on the module mount region.