A radio frequency amplifier includes a first input terminal, a second input terminal, an output terminal, and first and second amplifiers. The first amplifier includes a first amplifier input coupled to the first input terminal, and a first amplifier output. The second amplifier includes a second amplifier input coupled to the second input terminal, and a second amplifier output coupled to the output terminal by an output inductive element. An output combiner circuit is coupled between the first amplifier output and the second amplifier output. The output combiner circuit includes a first inductive element, a capacitor, and a second inductive element. The first inductive element is coupled between the first amplifier output and a first terminal of the capacitor, and the second inductive element is coupled between the second amplifier output and the first terminal of the capacitor. A second terminal of the capacitor is coupled to ground.

A semiconductor device includes a substrate, a conductive part, a controller module and a sealing resin. The substrate has a substrate obverse surface and a substrate reverse surface facing away from each other in a z direction. The conductive part is made of an electrically conductive material on the substrate obverse surface. The controller module is disposed on the substrate obverse surface and electrically connected to the conductive part. The sealing resin covers the controller module and at least a portion of the substrate. The conductive part includes an overlapping wiring trace having an overlapping portion overlapping with the electronic component as viewed in the z direction. The overlapping portion of the overlapping wiring trace is not electrically bonded to the controller module.

In this semiconductor device, an emitter electrode of a power semiconductor element includes a first sub-electrode provided in a region including a central portion of a front surface of a semiconductor substrate and a second sub-electrode provided in a region not including the central portion of the front surface of the semiconductor substrate. A first bonding wire connects the first sub-electrode and an emitter terminal. A second bonding wire connects the second sub-electrode and the emitter terminal. First and second voltage detectors detect voltages between the emitter terminal and the first and second sub-electrodes, respectively. It is possible to separately detect degradation of both the first bonding wire that degrades in an early period and the second bonding wire that degrades in a terminal period.

Provided is a package-on-package (PoP). The PoP includes a lower package, an upper package on the lower package, an interposer substrate disposed between the lower package and the upper package, and a plurality of balls connecting the interposer substrate to the upper package, in which the lower package includes a first substrate, and a first die and a second die disposed side by side in a horizontal direction, on the first substrate, in which the upper package includes a second substrate, a third die on the second substrate, and a plurality of ball pads disposed on a surface of the second substrate, the interposer substrate comprises on a surface thereof a plurality of ball lands to which a plurality of balls are attached, and at least some of the plurality of ball lands overlap the first die and the second die in a vertical direction that intersects the horizontal direction.

A semiconductor module includes at least two semiconductor elements connected in parallel; a control circuit board placed between the at least two semiconductor elements; a control terminal for external connection; a first wiring member that connects the control terminal and the control circuit board; and a second wiring member that connects a control electrode of one of the at least two semiconductor elements and the control circuit board, wherein the second wiring member is wire-bonded from the control electrode towards the control circuit board, and has a first end on the control electrode and a second end on the control circuit board, the first end having a cut end face facing upward normal to a surface of the control electrode and the second end having a cut end face facing sideways parallel to a surface of the control circuit board.

The object is to provide a semiconductor device that prevents a snapback operation and has excellent heat dissipation. The semiconductor device includes a semiconductor substrate, transistor portions, diode portions, a surface electrode, and external wiring. The transistor portions and the diode portions are provided in the semiconductor substrate and are arranged in one direction parallel with the surface of the semiconductor substrate. A bonding portion of the external wiring is connected to the surface electrode. The transistor portions and the diode portions are provided in a first region and a second region and alternately arranged in the one direction. A first transistor width and a first diode width in the first region are smaller than a width of the bonding portion. A second transistor width and a second diode width in the second region are larger than the width of the bonding portion.

A radio frequency (RF) transistor amplifier package includes a submount, and first and second leads extending from a first side of the submount. The first and second leads are configured to provide RF signal connections to one or more transistor dies on a surface of the submount. At least one rivet is attached to the surface of the submount between the first and second leads on the first side. One or more corners of the first side of the submount may be free of rivets. Related devices and associated RF leads and non-RF leads are also discussed.

A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.

A semiconductor device includes a substrate, an active region provided in the substrate, a plurality of gate fingers provided on the active region, extending in an extension direction, and arranged in an arrangement direction orthogonal to the extension direction, and a gate connection wiring commonly connected to the plurality of gate fingers and provided between the plurality of gate fingers and a first side surface of the substrate, wherein when viewed from the arrangement direction, a first position where a first end of a first gate finger as a part of the plurality of gate fingers is connected to the gate connection wiring is closer to the first side surface than a second position where a first end of a second gate finger as another part of the plurality of gate fingers is connected to the gate connection wiring.

A circuit includes a field effect transistor (FET), a reference transistor having an output coupled to an output of the FET, an active bias circuit coupled to the reference transistor and configured to generate an input signal for the reference transistor in response to a change in drain current of the reference transistor due to carrier trapping and to apply the input signal to an input of the reference transistor, and a summing node coupled to an input of the FET and to the input of the reference transistor. The summing node adds the input signal to an input signal of the FET to compensate the carrier trapping effect.