H01L2224/81825

Segmented pedestal for mounting device on chip

A system includes a semiconductor substrate having a first cavity. The semiconductor substrate forms a pedestal adjacent the first cavity. A device overlays the pedestal and is bonded to the semiconductor substrate by metal within the first cavity. A plurality of second cavities are formed in a surface of the pedestal beneath the device, wherein the second cavities are smaller than the first cavity. In some of these teachings, the second cavities are voids. In some of these teachings, the metal in the first cavity comprises a eutectic mixture. The structure relates to a method of manufacturing in which a layer providing a mask to etch the first cavity is segmented to enable easy removal of the mask-providing layer from the area over the pedestal.

ELECTRICAL CONNECTION PAD WITH ENHANCED SOLDERABILITY AND CORRESPONDING METHOD FOR LASER TREATING AN ELECTRICAL CONNECTION PAD
20220369455 · 2022-11-17 ·

The invention concerns an electrical connection pad (10′) for providing an electrical connection between components of an electronic system, wherein the electrical connection pad comprises: a metallic layer (12); and a laser induced periodic surface structure (20), LIPSS, formed on an external surface (16) of the electrical connection pad (10) and exposing the metallic layer (12) and a method for correspondingly laser-treating an electrical connection pad (10).

ELECTRICAL CONNECTION PAD WITH ENHANCED SOLDERABILITY AND CORRESPONDING METHOD FOR LASER TREATING AN ELECTRICAL CONNECTION PAD
20220369455 · 2022-11-17 ·

The invention concerns an electrical connection pad (10′) for providing an electrical connection between components of an electronic system, wherein the electrical connection pad comprises: a metallic layer (12); and a laser induced periodic surface structure (20), LIPSS, formed on an external surface (16) of the electrical connection pad (10) and exposing the metallic layer (12) and a method for correspondingly laser-treating an electrical connection pad (10).

METHODS AND APPARATUS TO EMBED HOST DIES IN A SUBSTRATE

Methods and apparatus to embed host dies in a substrate are disclosed An apparatus includes a first die having a first side and a second side opposite the first side. The first side includes a first contact to be electrically coupled with a second die. The second side includes a second contact. The apparatus further includes a substrate including a metal layer and a dielectric material on the metal layer. The first die is encapsulated within the dielectric material. The second contact of the first die is bonded to the metal layer independent of an adhesive.

DIFFUSION SOLDERING PREFORM WITH VARYING SURFACE PROFILE
20230065738 · 2023-03-02 ·

A method of soldering includes providing a substrate having a first metal joining surface, providing a semiconductor die having a second metal joining surface, providing a solder preform having a first interface surface and a second interface surface, arranging the solder preform between the substrate and the semiconductor die such that the first interface surface faces the first metal joining surface and such that the second interface surface faces the second metal joining surface, and performing a mechanical pressure-free diffusion soldering process that forms a soldered joint between the substrate and the semiconductor die by melting the solder preform and forming intermetallic phases in the solder. One or both of the first interface surface and the second interface surface has a varying surface profile that creates voids between the solder preform and one or both of the substrate and the semiconductor die before the melting of the solder preform.

Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects
09852969 · 2017-12-26 · ·

An apparatus relating generally to a die stack is disclosed. In such an apparatus, a substrate is included. A first bond via array includes first wires each of a first length extending from a first surface of the substrate. An array of bump interconnects is disposed on the first surface. A die is interconnected to the substrate via the array of bump interconnects. A second bond via array includes second wires each of a second length different than the first length extending from a second surface of the die.

WAFER STACKING FOR INTEGRATED CIRCUIT MANUFACTURING

A method of manufacturing integrated devices, and a stacked integrated device are disclosed. In an embodiment, the method comprises providing a substrate; mounting at least a first electronic component on the substrate; positioning a handle wafer above the first electronic component; attaching the first electronic component to the substrate via electrical connectors between the first electronic component and the substrate; and while attaching the first electronic component to the substrate, using the handle wafer to apply pressure, toward the substrate, to the first electronic component, to manage planarity of the first electronic component during the attaching. In an embodiment, a joining process is used to attach the first electronic component to the substrate via the electrical connectors. For example, thermal compression bonding may be used to attach the first electronic component to the substrate via the electrical connectors.

WAFER STACKING FOR INTEGRATED CIRCUIT MANUFACTURING

A method of manufacturing integrated devices, and a stacked integrated device are disclosed. In an embodiment, the method comprises providing a substrate; mounting at least a first electronic component on the substrate; positioning a handle wafer above the first electronic component; attaching the first electronic component to the substrate via electrical connectors between the first electronic component and the substrate; and while attaching the first electronic component to the substrate, using the handle wafer to apply pressure, toward the substrate, to the first electronic component, to manage planarity of the first electronic component during the attaching. In an embodiment, a joining process is used to attach the first electronic component to the substrate via the electrical connectors. For example, thermal compression bonding may be used to attach the first electronic component to the substrate via the electrical connectors.

METHOD OF BONDING A FIRST SUBSTRATE AND A SECOND SUBSTRATE

A method for bonding a first substrate and a second substrate, the first substrate having at least one first connection extending from one side of the first substrate, the method comprising fabricating a first adhesive material around and along a height of the at least one first connection; and bonding the at least one first connection, the first adhesive material, and the second substrate.

Multiple bond via arrays of different wire heights on a same substrate
09728527 · 2017-08-08 · ·

An apparatus relating generally to a substrate is disclosed. In such an apparatus, a first bond via array has first wires extending from a surface of the substrate. A second bond via array has second wires extending from the surface of the substrate. The first bond via array is disposed at least partially within the second bond via array. The first wires of the first bond via array are of a first height. The second wires of the second bond via array are of a second height greater than the first height for coupling of at least one die to the first bond via array at least partially disposed within the second bond via array.