Microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a packaged microelectronic device can include an interposer substrate with a plurality of interposer contacts. A microelectronic die is attached and electrically coupled to the interposer substrate. The device further includes a casing covering the die and at least a portion of the interposer substrate. A plurality of electrically conductive through-casing interconnects are in contact with and projecting from corresponding interposer contacts at a first side of the interposer substrate. The through-casing interconnects extend through the thickness of the casing to a terminus at the top of the casing. The through-casing interconnects comprise a plurality of filaments attached to and projecting away from the interposer contacts in a direction generally normal to the first side of the interposer substrate.

A circuit module includes a substrate module including an upper main surface with a normal line extending in a vertical direction, an electronic component on the substrate module, and a bonding adhesive fixing the electronic component to the upper main surface. The electronic component includes a first electrode. The substrate module includes a second electrode on the right of the bonding adhesive. The first electrode is electrically connected to the second electrode through solder. A first recess recessed downward and including a bottom is in the upper main surface. An upper end of the second electrode is above the bottom. The first recess includes a first area on the left of a first electrode and overlapping the second electrode when viewed in the lateral direction. A material of the first recess is identical to a material of the upper main surface.

The electronic component package body includes a substrate, an electronic component, and first pins. The substrate includes a bottom surface, a top surface, and a first side surface. The first side surface is connected between the bottom surface and the top surface. The electronic component is packaged inside the substrate. The first pins are embedded in the substrate, and penetrate from the bottom surface to the top surface. The first pins include a bottom surface and a side surface connected to the bottom surface. The bottom surface is exposed relative to the bottom surface, and at least a partial structure of the side surface is exposed relative to the first side surface. Both the bottom surface and the side surface are used for soldering with solder. Reliability of soldering the electronic component package body and a circuit board is high.

Electronic modules and methods of fabrication are described. In an embodiment, an electronic module includes a molded system-in-package, and a flexible circuit mounted on a side surface of a molding compound layer such that the flexible circuit is in electrical contact with a lateral interconnect exposed along the side surface of the molding compound layer.

An interconnect for a semiconductor device includes a laminate substrate; a first plurality of electrical devices in or on a surface of the laminate substrate; a redistribution layer having a surface disposed on the surface of the laminate substrate; a second plurality of electrical devices in or on the surface of the redistribution layer; and a plurality of transmission lines between the first plurality of electrical devices and the second plurality of electrical devices. The surface of the laminate substrate and the surface of the redistribution layer are parallel to each other to form a dielectric structure and a conductor structure.

A memory unit having a plurality of memory chips comprises: the memory unit that has a plurality of memory chips that are stacked; and protruding terminals that are disposed protruding from a side surface along the stacking direction of the memory unit, wherein the protruding terminals have surfaces that are positioned in a direction orthogonal to the protrusion direction, and between said surfaces, the surface roughness of a surface facing one way is greater than the surface roughness of a surface facing the other way.

An integrated circuit package provides a high bandwidth interconnect between wafers using a very high density interconnect using a silicon bridge or a multi-layer flex between wafers. In some embodiments, more than one wafer may be mounted and connected with a rigid silicon bridge onto a common substrate. This common substrate can be matched, with respect to their coefficients of thermal expansion (CTE), to the silicon wafer. The CTE matched substrate can reduce the thermal mechanical stress on the wafers and the rigid silicon bridge interconnect. In some embodiments, a thinned silicon bridge is utilized to interconnect wafers which are mounted on separate glass substrates. The thinned bridge would allow for mechanical compliance between the wafers. In some embodiments, the wafers can be mounted onto separate glass substrates and attached with a fine pitch multi-layer flex structure which provides compliance between the wafers.

In accordance with some embodiments of the present disclosure, a packaged semiconductor device includes a first package structure, at least one outer conductive bump, a second package structure, a sealing material, and an electromagnetic interference (EMI) shielding layer. The first package structure has a first cut edge. The outer conductive bump is disposed on the first package structure and has a second cut edge. The second package structure is jointed onto the first package structure. The sealing material is disposed on the first package structure, surrounds the second package structure, and covers the outer conductive bump. The sealing material has a third cut edge. The EMI shielding layer contacts the first cut edge, the second cut edge and the third cut edge. The EMI shielding layer is electrically connected with the outer conductive bump.

A packaged electronic device includes a package structure with opposite first and second sides spaced apart from one another along a first direction, and opposite third and fourth sides spaced apart from one another along a second direction, as well as first and second leads. The first lead includes a first portion that extends outward from the third side of the package structure and extends downward toward a plane of the first side and away from a plane of the second side. The second lead includes a first portion that extends outward from the third side of the package structure, and the second lead extends upward toward the plane of the second side and away from the plane of the first side to allow connection to another circuit or component, such as a second packaged electronic device, a passive circuit component, a printed circuit board, etc.

Printed circuit board (PCB) structures and methods of assembling them are described herein. In some embodiments, a PCB structure may include a first mounting hole; first, second, and third projections radiating from the first mounting hole; and a second mounting hole adjacent to the third projection. The first and second mounting holes located at opposite ends of the third projection. The second mounting hole to cause an electrical coupling of a bottom integrated circuit (IC) module to a connection structure included in a PCB, and the first mounting hole, the first projection, and the second projection to cause positioning of a top IC module above the bottom IC module and electrical coupling of the top IC module to the connection structure.