An image sensor includes a pixel with a photosensitive region accommodated within a semiconductor substrate and a MOS capacitive element with a conducting electrode electrically isolated by a dielectric layer. The dielectric layer forms an interface with both the photosensitive region and the semiconductor substrate, the interface of the dielectric layer including charge traps. A control circuit biases the electrode of the MOS capacitive element with a charge pumping signal designed to generate an alternation of successive inversion regimes and accumulation regimes in the photosensitive region. The charge pumping signal produces recombinations of photogenerated charges in the charge traps of the interface of the dielectric layer and the generation of a substrate current to empty recombined photogenerated charges.

A method, apparatus and system are described providing a high dynamic range pixel. An integration period has multiple sub-integration periods during which charges are accumulated in a photosensor and repeatedly transferred to a storage node, where the charges are accumulated for later transfer to another storage node for output.

A curved FPA comprises an array of detectors, with mesas etched between the detectors such that they are electrically and physically isolated from each other. Metallization deposited at the bottom of the mesas reconnects the detectors electrically and thereby provides a common ground between them. Strain induced by bending the FPA into a curved shape is across the metallization and any backfill epoxy, rather than across the detectors. Indium bumps are evaporated onto respective detectors for connection to a readout integrated circuit (ROIC). An ROIC coupled to the detectors is preferably thinned, and the backside of the ROIC may also include mesas such that the ROIC is reticulated.

Photosensors may be formed on a front side of a semiconductor substrate. An optical refraction layer having a first refractive index may be formed on a backside of the semiconductor substrate. A grid structure including openings is formed over the optical refraction layer. A masking material layer is formed over the grid structure and the optical refraction layer. The masking material layer may be anisotropically etched using an anisotropic etch process that collaterally etches a material of the optical refraction layer and forms non-planar distal surface portions including random protrusions on physically exposed portions of the optical refraction layer. An optically transparent layer having a second refractive index that is different from the first refractive index may be formed on the non-planar distal surface portions of the optical refraction layer. A refractive interface refracts incident light in random directions, and improves quantum efficiency of the photosensors.

An apparatus including a semiconductor substrate; an absorption layer coupled to the semiconductor substrate, the absorption layer including a photodiode region configured to absorb photons and to generate photo-carriers from the absorbed photons; one or more first switches controlled by a first control signal, the one or more first switches configured to collect at least a portion of the photo-carriers based on the first control signal; and one or more second switches controlled by a second control signal, the one or more second switches configured to collect at least a portion of the photo-carriers based on the second control signal, where the second control signal is different from the first control signal.

The present technology relates to an image sensor, an imaging device, and a ranging device capable of performing imaging so that noise is reduced. A photoelectric conversion unit configured to perform photoelectric conversion; a charge accumulation unit configured to accumulate charges obtained by the photoelectric conversion unit; a transfer unit configured to transfer the charges from the photoelectric conversion unit to the charge accumulation unit; a reset unit configured to reset the charge accumulation unit; a reset voltage control unit configured to control a voltage to be applied to the reset unit; and an additional control unit configured to control addition of capacitance to the charge accumulation unit are included. The charge accumulation unit includes a plurality of regions. The present technology can be applied to, for example, an imaging device that captures an image and a ranging device that performs ranging.

Structures for a photonics chip that include a fully-depleted silicon-on-insulator field-effect transistor and related methods. A first device region of a substrate includes a first device layer, a first portion of a second device layer, and a buried insulator layer separating the first device layer from the first portion of the second device layer. A second device region of the substrate includes a second portion of the second device layer. The first device layer, which has a thickness in a range of about 4 to about 20 nanometers, transitions in elevation to the second portion of the second device layer with a step height equal to a sum of the thicknesses of the first device layer and the buried insulator layer. A field-effect transistor includes a gate electrode on the top surface of the first device layer. An optical component includes the second portion of the second device layer.

A solid-state image capturing device according to the present disclosure includes an image capturing element, a light transmitting member, a support member, a sealing resin member, and a wall member. The image capturing element is mounted on a substrate. The support member is arranged in a part of an outer-peripheral portion of the image capturing element, the outer-peripheral portion surrounding a light receiving unit of the image capturing element. The light transmitting member is supported by the support member. The sealing resin member is arranged in a peripheral portion of the image capturing element. The wall member is provided between the sealing resin member and a part of the outer-peripheral portion of the image capturing element, the part excluding a part in which the support member is arranged.

An image sensor includes: a pixel substrate that includes a plurality of pixels each having a photoelectric conversion unit that generates an electric charge through photoelectric conversion executed on light having entered therein and an output unit that generates a signal based upon the electric charge and outputs the signal; and an arithmetic operation substrate that is laminated on the pixel substrate and includes an operation unit that generates a corrected signal by using a reset signal generated after the electric charge in the output unit is reset and a photoelectric conversion signal generated based upon an electric charge generated in the photoelectric conversion unit and executes an arithmetic operation by using corrected signals each generated in correspondence to one of the pixels.

Provided is a semiconductor device capable of improving the optical response speed. The semiconductor device includes a pixel array portion in which a plurality of pixels are arranged in a matrix, each of the plurality of pixels including: a pixel forming region partitioned by a separation region in a semiconductor layer; a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type sequentially arranged from a first surface side of the pixel forming region toward a second surface side opposite to the first surface; a pn junction portion in which the first semiconductor region and the second semiconductor region are bonded; a charge extraction region of the second conductivity type provided in a side wall of the separation region; and a relay region of the second conductivity type provided at a position deeper than the second semiconductor region so as to be connected to the charge extraction region and the second semiconductor region. A plurality of the pn junction portions are scattered apart from each other, and the relay region has a higher impurity concentration than the second semiconductor region and terminates at a peripheral portion so as to surround a central portion of a surface of the second semiconductor region opposite to the pn junction portion side.