A semiconductor device is provided. The device comprises first semiconductor wafer comprising first BEOL structure disposed on first side of first substrate, the first BEOL structure comprising first metallization layer disposed over the first substrate, second metallization layer disposed over the first metallization layer, first storage device disposed between the first and second metallization layers, and first transistor contacting the first storage device, and a first bonding layer disposed over the first BEOL structure. The device also comprises second semiconductor wafer comprising second BEOL structure disposed on first side of second substrate, the second BEOL structure comprising third metallization layer disposed over the second substrate, fourth metallization layer disposed over the third metallization layer, second storage device disposed between the third and fourth metallization layers, and second transistor contacting the second storage device, and second bonding layer disposed over the second BEOL structure and contacting the first bonding layer.

A first circuit structure of an electronic IC device includes comprises light-sensitive optical circuit components. A second circuit structure of the electronic IC device includes an electronic circuit component and an electrically-conductive layer extending between and at a distance from the optical circuit components and the electronic circuit component. Electrical connections link the optical circuit components and the electronic circuit component. These electrical connections are formed in holes which pass through dielectric layers and the intermediate conductive layer. Electrical insulation rings between the electrical connections and the conductive layer are provided which surround the electrical connections and have a thickness equal to a thickness of the conductive layer.

Disclosed herein is a method comprising: forming a first electrically conductive layer on a first surface of a substrate of semiconductor, wherein the first electrically conductive layer is in electrical contact with the semiconductor; bonding, at the first electrically conductive layer, a support wafer to the substrate of semiconductor; thinning the substrate of semiconductor.

A curved FPA comprises an array of detectors, with mesas etched between the detectors such that they are electrically and physically isolated from each other. Metallization deposited at the bottom of the mesas reconnects the detectors electrically and thereby provides a common ground between them. Strain induced by bending the FPA into a curved shape is across the metallization and any backfill epoxy, rather than across the detectors. Indium bumps are evaporated onto respective detectors for connection to a readout integrated circuit (ROIC). An ROIC coupled to the detectors is preferably thinned, and the backside of the ROIC may also include mesas such that the ROIC is reticulated.

A method for manufacturing a back-illuminated solid-state imaging device includes a first step of preparing a first conduction-type semiconductor layer having a front surface and a back surface, a second step of forming a first asperity region on the front surface of the semiconductor layer by selectively etching the front surface of the semiconductor layer, a third step of forming a second asperity region on the front surface of the semiconductor layer by smoothening asperities of the first asperity region, and a fourth step of forming an insulating layer along the second asperity region and forming a plurality of charge transfer electrodes on the insulating layer.

The present invention provides a method of forming a metal grid, a backside illuminated (BSI) image sensor, and a method of forming the BSI image sensor. In the methods, an etch stop layer and a metal material layer are successively deposited in geometric conformity over a substrate already formed therein with a recess and a conductive pillar, followed by the formation of a bonding pad on the metal material layer in the recess. After that, a dielectric cap layer is deposited and etched together with the metal material layer and the etch stop layer to form the metal grid. According to the present invention, the deposited metal material layer has reduced surface roughness, which results in improved thickness uniformity of the resulting metal grid. The metal grid is overall easier to form, resulting in savings in cost and increased performance of the device being fabricated.

Embodiments of a hybrid imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed.

The sensor chip stack comprises a sensor substrate of a semiconductor material including a sensor, a chip fastened to the sensor substrate, the chip including an integrated circuit, electric interconnections between the sensor substrate and the chip, electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material.

A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.

A method for fabricating an image sensor array having a first group of photodiodes for detecting light at visible wavelengths a second group of photodiodes for detecting light at infrared or near-infrared wavelengths, the method including forming a germanium-silicon layer for the second group of photodiodes on a first semiconductor donor wafer; defining a first interconnect layer on the germanium-silicon layer; defining integrated circuitry for controlling pixels of the image sensor array on a semiconductor carrier wafer; defining a second interconnect layer on the semiconductor carrier wafer; bonding the first interconnect layer with the second interconnect layer; defining the pixels of an image sensor array on a second semiconductor donor wafer; defining a third interconnect layer on the image sensor array; and bonding the third interconnect layer with the germanium-silicon layer.