Bi-directional trench power switches. At least one example is a semiconductor device comprising: an upper base region associated with a first side of a substrate of semiconductor material; an upper-CE trench defined on the first side, the upper-CE trench defines a proximal opening at the first side and a distal end within the substrate; an upper collector-emitter region disposed at the distal end of the upper-CE trench; a lower base region associated with a second side of substrate; and a lower collector-emitter region associated with the second side.

In one example, a sensor includes a heterojunction bipolar transistor and component sensing surface coupled to the heterojunction bipolar transistor via an extended base component. In another example, a biosensor for detecting a target analyte includes a heterojunction bipolar transistor and a sensing surface. The heterojunction bipolar transistor includes a semiconductor emitter including an emitter electrode for connecting to an emitter voltage, a semiconductor collector including a collector electrode for connecting to a collector voltage, and a semiconductor base positioned between the semiconductor emitter and the semiconductor collector. The sensing surface is coupled to the semiconductor base of the heterojunction bipolar transistor via an extended base component and includes a conducting film and a reference electrode.

On a single-crystal semiconductor substrate with an upper surface including a first direction in which an inverted mesa step extends and a second direction in which a forward mesa step extends in response to anisotropic etching in which an etching rate depends on crystal plane orientation, a bipolar transistor including a collector layer, a base layer, and an emitter layer that are epitaxially grown, and a base wire connected to the base layer are arranged. A step is provided at an edge of the base layer, and the base wire is extended from inside to outside of the base layer in a direction intersecting the first direction in a plan view. An intersection of the edge of the base layer and the base wire has a disconnection prevention structure that makes it difficult for step-caused disconnection of the base wire to occur.

A bipolar transistor includes a stack of an emitter, a base, and a collector. The base is structured to have a comb shape including fingers oriented in a plane orthogonal to a stacking direction of the stack.

The present disclosure relates to semiconductor structures and, more particularly, to vertical bipolar transistors and methods of manufacture. The structure includes: an intrinsic base region comprising semiconductor-on-insulator material; a collector region confined within an insulator layer beneath the semiconductor-on-insulator material; an emitter region above the intrinsic base region; and an extrinsic base region above the intrinsic base region.

This application provides an insulated gate bipolar transistor, a motor control unit, and a vehicle. The insulated gate bipolar transistor includes three device structure feature layers that are laminated. An IGBT device structure feature layer (10) and an RC-IGBT device structure feature layer (30) are respectively arranged on two sides of an SJ device structure feature layer (20). The RC-IGBT device structure feature layer (30) includes a collector (12) and a drain (13) that are disposed at a same layer. The insulated gate bipolar transistor further includes a first metal electrode (15) laminated with and electrically connected to the collector (12), and a second metal electrode (14) laminated with and electrically connected to the drain (13), and the first metal electrode (15) is electrically isolated from the second metal electrode (14).

A heterojunction bipolar transistor includes: a substrate; a base mesa disposed on the substrate, wherein the base mesa includes a collector layer and a base layer disposed on the collector layer, and wherein in a top view, the base layer includes a first edge and a second edge opposite to the first edge; an emitter layer disposed on the base layer; a base electrode disposed on the substrate and connected to the base layer; a dielectric layer disposed on the base electrode, wherein a first via hole is formed in the dielectric layer at the first edge of the base layer, and a second via hole is formed in the dielectric layer at the second edge of the base layer; and a conductive feature disposed on the dielectric layer, wherein the conductive feature is connected to the base electrode through the first via hole and the second via hole.

Aspects generally relate to a heterojunction bipolar transistor (HBT), and method of manufacturing the same. The HBT including an emitter a first, a first side of a base coupled to a second side of the emitter opposite the first side of the emitter. A collector coupled to the base on a second side of the base opposite the emitter, wherein an area of a junction between the base and the collector is less than or equal to an area of a junction between the base and the emitter. A dielectric coupled to the collector. A first conductive base contact coupled to the base and adjacent to the collector and extending over a base-collector junction, the conductive base contact operative as a field plate.

A semiconductor device and a method of making a semiconductor device. The device includes an emitter. The device also includes a collector. The device further includes a base stack. The base is located between the emitter and the collector. The base stack includes an intrinsic base region. The device further includes a base electrode. The base electrode comprises a silicide. The silicide of the base electrode may be in direct contact with the base stack. The device may be a heterojunction bipolar transistor.

An improved SiC trench MOSFET having first and second type gate trenches for formation of a gate electrode, and a grounded P-shield region under the gate electrode for gate oxide electric-field reduction is disclosed. The gate electrodes are disposed into the first type gate trench having a thick oxide layer on trench bottom. The grounded P-shield region surrounding the second type gate trench filled up with the thick oxide layer is connected with a source metal through a grounded P region. The device further comprises a current spreading region surrounding the first type gate trench for on-resistance reduction.