Patent classifications
H01L31/035263
METHOD FOR FABRICATING A HETEROJUNCTION SCHOTTKY GATE BIPOLAR TRANSISTOR
Certain embodiments of the present invention may be directed to a transistor structure. The transistor structure may include a semiconductor substrate. The semiconductor substrate may include a drift region, a collector region, an emitter region, and a lightly-doped/undoped region. The lightly-doped/undoped region may be lightly-doped and/or undoped. The transistor structure may also include a heterostructure. The heterostructure forms a heterojunction with the lightly-doped/undoped region. The transistor structure may also include a collector terminal. The collector terminal is in contact with the collector region. The transistor structure may also include a gate terminal. The gate terminal is in contact with the heterostructure. The transistor structure may also include an emitter terminal. The emitter terminal is in contact with the lightly-doped/undoped region and the emitter region.
AVALANCHE PHOTODIODE STRUCTURE
An avalanche photodiode (APD) structure, comprising an absorption layer comprising InGaAs, InGaAlAs, InGaAsP, or an InGaAs/GaAsSb type-II superlattice, an avalanche layer comprising AlGaAsSb, and a transition portion disposed between the absorption layer and the avalanche layer is disclosed. The transition portion comprises a first grading layer of InAlGaAs or InGaAsP and a first field control layer disposed between the first grading layer and the avalanche layer. The first field control layer has a bandgap between the bandgap of the absorption layer and the bandgap of the avalanche layer. In an alternative embodiment, an avalanche photodiode (APD) structure, comprising an absorption layer comprising GaAsSb, an avalanche layer comprising AlGaAsSb, and a transition portion disposed between the absorption layer and the avalanche layer. The transition portion comprises a first grading layer and one or more field control layers having a bandgap between the bandgaps of the absorption layer and the avalanche layer.
PHOTODETECTOR AND INTEGRATED CIRCUIT
A photodetector and an integrated circuit with shortened response time requires a photodetector with an N-type semiconductor layer, a P-type semiconductor layer, and a light absorption layer sandwiched between the N-type semiconductor layer and the P-type semiconductor layer. The light absorption layer includes a layer strained in compression or in tension and a heterostructure which increases the mobility of charge carriers in the light absorption layer.
VERTICAL SILICON AND III-V PHOTOVOLTAICS INTEGRATION WITH SILICON ELECTRONICS
A photovoltaic structure includes a substrate; and a plurality of off-axis, doped silicon regions outward of the substrate. The plurality of off-axis, doped silicon regions have an off-axis lattice orientation at a predetermined non-zero angle. A plurality of photovoltaic devices of a first chemistry are located outward of the plurality of off-axis, doped silicon regions. Optionally, a plurality of photovoltaic devices of a second chemistry, different than the first chemistry, are located outward of the substrate and are spaced away from the plurality of off-axis, doped silicon regions.
Vertical silicon and III-V photovoltaics integration with silicon electronics
A photovoltaic structure includes a substrate; and a plurality of off-axis, doped silicon regions outward of the substrate. The plurality of off-axis, doped silicon regions have an off-axis lattice orientation at a predetermined non-zero angle. A plurality of photovoltaic devices of a first chemistry are located outward of the plurality of off-axis, doped silicon regions. Optionally, a plurality of photovoltaic devices of a second chemistry, different than the first chemistry, are located outward of the substrate and are spaced away from the plurality of off-axis, doped silicon regions.
Heterojunction schottky gate bipolar transistor
Certain embodiments of the present invention may be directed to a transistor structure. The transistor structure may include a semiconductor substrate. The semiconductor substrate may include a drift region, a collector region, an emitter region, and a lightly-doped/undoped region. The lightly-doped/undoped region may be lightly-doped and/or undoped. The transistor structure may also include a heterostructure. The heterostructure forms a heterojunction with the lightly-doped/undoped region. The transistor structure may also include a collector terminal. The collector terminal is in contact with the collector region. The transistor structure may also include a gate terminal. The gate terminal is in contact with the heterostructure. The transistor structure may also include an emitter terminal. The emitter terminal is in contact with the lightly-doped/undoped region and the emitter region.
SUPERLATTICE PHOTO DETECTOR
A photo detector includes a superlattice with an undoped first semiconductor layer including undoped intrinsic semiconductor material, a doped second semiconductor layer having a first conductivity type on the first semiconductor layer, an undoped third semiconductor layer including undoped intrinsic semiconductor material on the second semiconductor layer, and a fourth semiconductor layer having a second opposite conductivity type on the third semiconductor layer, along with a first contact having the first conductivity type in the first, second, third, and fourth semiconductor layers, and a second contact having the second conductivity type and spaced apart from the first contact in the first, second, third, and fourth semiconductor layers. An optical shield on a second shielded portion of a top surface of the fourth semiconductor layer establishes electron and hole lakes. A packaging structure includes an opening that allows light to enter an exposed first portion of the top surface of the fourth semiconductor layer.
Semiconductor body
A semiconductor body is disclosed. In an embodiment a semiconductor body includes an n-doped region comprising a first layer sequence comprising pairs of alternating layers, wherein a first layer and a second layer of each pair differ in their doping concentration, and wherein the first and second layers of each pair have the same material composition except for their doping and a second layer sequence comprising pairs of alternating layers, wherein a first layer and a second layer of each pair differ in their material composition, an active region, wherein the second layer sequence is disposed between the first layer sequence and the active region and a p-doped region, wherein the active region is disposed between the n-doped region and the p-doped region.
HETEROSTRUCTURE AND LIGHT-EMITTING DEVICE EMPLOYING THE SAME
Heterostructures containing one or more sheets of positive charge, or alternately stacked AlGaN barriers and AlGaN wells with specified thickness are provided. Also provided are multiple quantum well structures and p-type contacts. The heterostructures, the multiple quantum well structures and the p-type contacts can be used in light emitting devices and photodetectors.
Concentrator photovoltaic subassembly and method of constructing the same
Refractive optical element designs are provided for high geometric optical efficiency over a wide range of incident angles. To minimize Fresnel reflection losses, the refractive optical element designs employ multiple encapsulant materials, differing in refractive index. Concentrator photovoltaic subassemblies are formed by embedding a high efficiency photovoltaic device within the refractive optical element, along with appropriate electrical contacts and heat sinks. Increased solar electric power output is obtained by employing a single-junction III-V material structure with light-trapping structures.