Patent classifications
H01L31/1055
Semiconductor device and manufacturing method thereof
In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
Pin device and manufacturing method thereof, photosensitive device and display device
A PIN device includes: a first doped layer, a second doped layer, and an intrinsic layer between the first doped layer and the second doped layer, where the second doped layer includes a body portion and an electric field isolating portion at least partially enclosing the body portion; and the electric field isolating portion is doped differently from the body portion.
MICROSTRUCTURE ENHANCED ABSORPTION PHOTOSENSITIVE DEVICES
Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
Display device
A display device includes a thin-film transistor layer disposed on a substrate and including thin-film transistors; and an emission material layer disposed on the thin-film transistor layer. The emission material layer includes light-emitting elements each including a first light-emitting electrode, an emissive layer and a second light-emitting electrode, light-receiving elements each including a first light-receiving electrode, a light-receiving semiconductor layer and a second light-receiving electrode, and a first bank disposed on the first light-emitting electrode and defining an emission area of each of the light-emitting elements. The light-receiving elements are disposed on the first bank.
Photosensitive Sensor, Manufacturing Method Thereof, and Display Panel
A photosensitive sensor, a manufacturing method thereof and a display panel are provided. The photosensitive sensor includes a first type semiconductor layer, an intrinsic semiconductor layer disposed on a side of the first type semiconductor layer, and a second type semiconductor layer disposed on a side of the intrinsic semiconductor layer away from the first type semiconductor layer. The intrinsic semiconductor layer is provided with metal particles capable of generating a surface plasmon effect. The metal particles are dispersely distributed in the intrinsic semiconductor layer.
Photosensors for color measurement
A sensor package includes a semiconductor sensor chip having multiple light sensitive regions each of which defines a respective light sensitive channel. An optical filter structure is disposed over the sensor chip and includes filters defining respective spectral functions for different ones of the light sensitive channels. In particular, the optical filter structure includes at least three optical filters defining spectral functions for tristimulus detection by a first subset of the light sensitive channels, and at least one additional optical filter defining a spectral function for spectral detection by a second subset of the light sensitive channels encompassing a wavelength range that differs from that of the first subset of light sensitive channels.
Thin film transistor array substrate for digital X-ray detector device and digital X-ray detector device including the same
A thin film transistor array substrate for a digital X-ray detector device including a base substrate; a plurality of data lines and a plurality of gate lines disposed on the base substrate and arranged to cross each other; a driving thin film transistor disposed above the base substrate and including a first electrode, a second electrode, a gate electrode and an active layer; a PIN diode connected to the driving thin film transistor; and at least one shielding layers disposed above the driving thin film transistor and configured to overlay the active layer, wherein the at least one shielding layers are electrically connected to the plurality of data lines.
SHORT-WAVE INFRA-RED RADIATION DETECTION DEVICE
A short-wave infra-red, SWIR, radiation detection device comprises: a first metallic layer providing a first set of connections from a readout circuit to respective cells of a matrix, the metallic layer reflecting SWIR wavelength radiation. Each matrix cell comprises at least one stack of layers including: a first layer of doped semiconductor material formed on the first metallic layer; an at least partially microcrystalline semiconductor layer formed over the first doped layer; a second layer of semiconductor material formed on the microcrystalline semiconductor layer; at least one microcrystalline semiconductor layer; and in some embodiments a second metallic layer interfacing the microcrystalline semiconductor layer(s), the interface being responsive to incident SWIR radiation to generate carriers within the stack. The stack has a thickness T=λ/2N between reflective surfaces of the first and second metallic layers.
Pin/pin stacked photodetection film and photodetection display apparatus
A photodetection film includes at least one lower photodiode and upper photodiode layered members. The at least one lower photodiode layered member includes lower first-type, intrinsic and second-type semiconductor layers. The at least one upper photodiode layered member is disposed on the at least one lower photodiode layered member and includes upper first-type, intrinsic and second-type semiconductor layers. The upper intrinsic semiconductor layer has an amorphous silicon structure. The lower intrinsic semiconductor layer has a structure selected from one of a microcrystalline silicon structure, a microcrystalline silicon-germanium structure, and a non-crystalline silicon-germanium structure.
Contacting area on germanium
A method of forming an opening in an insulating layer covering a semiconductor region including germanium, successively including: the forming of a first masking layer on the insulating layer; the forming on the first masking layer of a second masking layer including an opening; the etching of an opening in the first masking layer, in line with the opening of the second masking layer; the removal of the second masking layer by oxygen-based etching; and the forming of the opening of said insulating layer in line with the opening of the first masking layer, by fluorine-based etching.