An ICIP comprises: a number N.sub.s of IC stages, wherein N.sub.s is configured to achieve a fundamental limit of the detectivity D.sub.peak* the ICIP within a range, and wherein each of the IC stages comprises: a hole barrier; an absorber coupled to the hole barrier and comprising a thickness d, wherein d is configured to achieve D.sub.peak* within the range; and an electron barrier coupled to the absorber. A method of manufacturing an ICIP comprises: determining a number N.sub.s of IC stages of the ICIP, wherein N.sub.s is configured to achieve a peak detectivity D.sub.peak* of the ICIP within a range; determining a thickness d of an absorber, wherein d is configured to achieve D.sub.peak* within the range; obtaining a substrate; forming an electron barrier on the substrate, the absorber having d on the electron barrier, and a hole barrier on the absorber; and repeating the forming N.sub.s times.

An ICIP comprises: a number N.sub.s of IC stages, wherein N.sub.s is configured to achieve a fundamental limit of the detectivity D.sub.peak* the ICIP within a range, and wherein each of the IC stages comprises: a hole barrier; an absorber coupled to the hole barrier and comprising a thickness d, wherein d is configured to achieve D.sub.peak* within the range; and an electron barrier coupled to the absorber. A method of manufacturing an ICIP comprises: determining a number N.sub.s of IC stages of the ICIP, wherein N.sub.s is configured to achieve a peak detectivity D.sub.peak* of the ICIP within a range; determining a thickness d of an absorber, wherein d is configured to achieve D.sub.peak* within the range; obtaining a substrate; forming an electron barrier on the substrate, the absorber having d on the electron barrier, and a hole barrier on the absorber; and repeating the forming N.sub.s times.

A differential amplifier includes an unmatched pair, including first quantum dots and second quantum dots, and a matched pair, including first and second phototransistors. The unmatched pair has a difference between a first spectrum absorbed by the first quantum dots and a second spectrum absorbed by the second quantum dots. Each of the first and second phototransistors includes a channel. The first quantum dots absorb the first spectrum from incident electromagnetic radiation and gate a first current through the channel of the first phototransistor, and the second quantum dots absorb the second spectrum from the incident electromagnetic radiation and gate a second current through the channel of the second phototransistor. The first and second phototransistors are coupled together for generating a differential output from the first and second currents, the differential output corresponding to the difference between the first and second spectrums within the incident electromagnetic radiation.

A method of forming an integrated circuit employs a plurality of layers formed on a substrate including i) bottom n-type ohmic contact layer, ii) p-type modulation doped quantum well structure (MDQWS) with a p-type charge sheet formed above the bottom n-type ohmic contact layer, iii) n-type MDQWS offset vertically above the p-type MDQWS, and iv) etch stop layer formed above the p-type MDQWS. P-type ions are implanted to define source/drain ion-implanted contact regions of a p-channel HFET which encompass the p-type MDQWS. An etch operation removes layers above the etch stop layer of iv) for the source/drain ion-implanted contact regions using an etchant that automatically stops at the etch stop layer of iv). Another etch operation removes remaining portions of the etch stop layer of iv) to form mesas that define an interface to the source/drain ion-implanted contact regions of the p-channel HFET. Source/Drain electrodes are on such mesas.

A method of manufacturing a semiconductor structure includes: forming a light-absorption layer in a substrate; forming a first doped region of a first conductivity type and a second doped region of a second conductivity type in the light-absorption layer adjacent to the first doped region; depositing a first patterned mask layer over the light-absorption layer, wherein the first patterned mask layer includes an opening exposing the second doped region and covers the first doped region; forming a first silicide layer in the opening on the second doped region; depositing a barrier layer over the first doped region; and annealing the barrier layer to form a second silicide layer on the first doped region.

A light reception element and an electronic apparatus in which leakage current can be reduced to decrease current consumption are provided. The light reception element includes a pixel array section. The pixels each include two taps that detect an electric charge obtained through photoelectric conversion by a photoelectric conversion section. A flat region in each pixel, except the two taps and a pixel transistor region, includes a tap peripheral region and a pixel transistor neighboring region. In the tap peripheral region, an embedded oxide film is formed on a surface opposite to a light incident surface of a substrate, and a first semiconductor region is formed on the light incident surface side of the embedded oxide film. In the pixel transistor neighboring region, a second semiconductor region is formed. The present technology is applicable to a light reception element that carries out ranging, for example.

A CMOS image sensor includes: a substrate containing a potential well stack including: a first p-well, a first n-well disposed below the first p-well, a second p-well disposed below the first n-well, a second n-well disposed below the second p-well, and a third p-well disposed below the second n-well, wherein a first photodiode is formed at the junction between the first p-well and first n-well, a second photodiode is formed at the junction between the first n-well and second p-well, a third photodiode is formed at the junction between the second p-well and the second n-well, and a fourth photodiode is formed at the junction between the second n-well and the third p-well, and each photodiode is disposed at a different respective depth within the substrate; and a plurality of active pixel sensors for converting light received by the photodiodes into electrical charge.

A dynamic photodiode detector or detector array having a light absorbing region of doped semiconductor material for absorbing photons. Electrons or holes generated by photon absorption are detected with a construction of oppositely heavily doped anode and cathode regions and a heavily doped ground region of the same doping type as the anode region. Photon detection involves switching the device from reverse bias to forward bias to create a depletion region enclosing the anode region. When a photon is then absorbed the electron or hole thereby generated drifts under the electric field induced by the biasing to the depletion region where it causes the anode-to-ground current to increase. Furthermore, the detector is configured such that anode-to-cathode current starts to flow once a threshold number of electrons or holes reaches the depletion region, where the threshold may be one to provide single photon detection.

A dynamic photodiode detector or detector array having a light absorbing region of doped semiconductor material for absorbing photons. Electrons or holes generated by photon absorption are detected with a construction of oppositely heavily doped anode and cathode regions and a heavily doped ground region of the same doping type as the anode region. Photon detection involves switching the device from reverse bias to forward bias to create a depletion region enclosing the anode region. When a photon is then absorbed the electron or hole thereby generated drifts under the electric field induced by the biasing to the depletion region where it causes the anode-to-ground current to increase. Furthermore, the detector is configured such that anode-to-cathode current starts to flow once a threshold number of electrons or holes reaches the depletion region, where the threshold may be one to provide single photon detection.

A photoelectric conversion element encompasses a depletion-layer extension-promotion region having a p-type upper layer, a p-type photoelectric conversion layer in contact with the depletion-layer extension-promotion region, and an n-type surface-buried region buried in an upper portion of the photoelectric conversion layer, configured to implement a photodiode together with the photoelectric conversion layer. A first p-well is surrounded by a first n-tab, the first n-tab is surrounded by a second p-well, the second p-well is surrounded by a second n-tab, and the second n-tab is surrounded by a third p-well. An injection-blocking element blocks injection of carriers of opposite conductivity type to signal charges from the second p-well into the photoelectric conversion layer, and the inside of the photoelectric conversion layer is depleted by a voltage applied to the depletion-layer extension-promotion region.