A method of forming an integrated circuit employs a plurality of layers formed on a substrate including i) bottom n-type ohmic contact layer, ii) p-type modulation doped quantum well structure (MDQWS) with a p-type charge sheet formed above the bottom n-type ohmic contact layer, iii) n-type MDQWS offset vertically above the p-type MDQWS, and iv) etch stop layer formed above the p-type MDQWS. P-type ions are implanted to define source/drain ion-implanted contact regions of a p-channel HFET which encompass the p-type MDQWS. An etch operation removes layers above the etch stop layer of iv) for the source/drain ion-implanted contact regions using an etchant that automatically stops at the etch stop layer of iv). Another etch operation removes remaining portions of the etch stop layer of iv) to form mesas that define an interface to the source/drain ion-implanted contact regions of the p-channel HFET. Source/Drain electrodes are on such mesas.

In certain examples, methods and photo-responsive structures are directed to devices involving a diamond-based photoconductive switch having a doped diamond-grown material in the switch. The doped diamond-grown material may be formed from different gases combined on a diamond seed, such that as grown, the diamond-based material manifests a controlled dopant concentration level of a polarity type and over a depth of optical absorption sufficient to ionize the dopants in response to an optical signal.

A light-emitting component includes a light-emitting element, a driving thyristor, and a light-absorbing layer. The light-emitting element emits light of a predetermined wavelength. The driving thyristor causes the light-emitting element to emit light or causes an amount of light emitted by the light-emitting element to increase, upon entering an on-state. The light-absorbing layer is disposed between the light-emitting element and the driving thyristor such that the light-emitting element and the driving thyristor are stacked, and absorbs light emitted by the driving thyristor.

A split electrode vertical cavity optical device includes an n-type ohmic contact layer, first through fifth ion implant regions, cathode and anode electrodes, first and second injector terminals, and p and n type modulation doped quantum well structures. The cathode electrode and the first and second ion implant regions are formed on the n-type ohmic contact layer. The third ion implant region is formed on the first ion implant region and contacts the p-type modulation doped QW structure. The fourth ion implant region encompasses the n-type modulation doped QW structure. The first and second injector terminals are formed on the third and fourth ion implant regions, respectively. The fifth ion implant region is formed above the n-type modulation doped QW structure and the anode electrode is formed above the fifth ion implant region.

A Dual-wavelength hybrid (DWH) device includes an n-type ohmic contact layer, cathode and anode terminal electrodes, first and second injector terminal electrodes, p-type and n-type modulation doped QW structures, and first through sixth ion implant regions. The first injector terminal electrode is formed on the third ion implant region that contacts the p-type modulation doped QW structure and the second injector terminal electrode is formed on the fourth ion implant region that contacts the n-type modulation doped QW structure. The DWH device operates in at least one of a vertical cavity mode and a whispering gallery mode. In the vertical cavity mode, the DWH device converts an in-plane optical mode signal to a vertical optical mode signal, whereas in the whispering gallery mode the DWH device converts a vertical optical mode signal to an in-plane optical mode signal.

An example image intensifier includes a quantum well infrared photodetector (QWIP) configured to receive photons to photoexcite carriers out of a localized quantum state; and a light emitting diode (LED), wherein the photoexcited carriers control the LED.

A light-emitting component includes a substrate, a light-emitting element, a thyristor, and a light-transmission reduction layer. The light-emitting element is disposed on the substrate. The thyristor causes the light-emitting element to emit light or causes an amount of light emitted by the light-emitting element to increase, upon entering an on-state. The light-transmission reduction layer is disposed between the light-emitting element and the thyristor such that the light-emitting element and the thyristor are stacked, and suppresses light emitted by the thyristor from passing therethrough.

The present disclosure provides a silicon carbide (SiC) opto-thyristor and a method for manufacturing the same. The SiC opto-thyristor includes a SiC substrate, a SiC light emitter and a SiC light-sensitive thyristor. In the method, a SiC epitaxy is mainly formed on the SiC substrate with the doped P-type and N-type semiconductor materials to define the regions for forming the SiC light emitter and the basic structures of the SiC light-sensitive thyristor. A passivation layer is deposited. Conducting channels for the SiC light emitter and the SiC light-sensitive thyristor are formed by an etching process. After patterning a metal conductor layer, a structure of electrical contacts of the SiC light emitter and the SiC light-sensitive thyristor is formed. Then, terminals of an input voltage and an output voltage of the silicon carbide opto-thyristor are formed after a wire bonding process upon the electrical contacts. Finally, a packaging process is performed.

An optical switch includes: a photothyristor that is switched from an off state to an on state by incident light; a light-emitting element that emits outgoing light when the photothyristor is in the on state; and a tunnel junction layer or a III-V compound layer having metallic conductivity. The tunnel junction layer or the III-V compound layer is disposed between the photothyristor and the light-emitting element.

A layered structure includes a thyristor and a light-emitting element. The thyristor at least includes four layers. The four layers are an anode layer, a first gate layer, a second gate layer, and a cathode layer arranged in this order. The light-emitting element is disposed such that the light-emitting element and the thyristor are connected in series. The thyristor includes a semiconductor layer having a bandgap energy smaller than bandgap energies of the four layers.