Patent classifications
H03F2203/21131
HIGH-POWER AMPLIFIER PACKAGE
Package assemblies for improving heat dissipation of high-power components in microwave circuits are described. A laminate that includes microwave circuitry may have cut-outs that allow high-power components to be mounted directly on a heat slug below the laminate. Electrical connections to circuitry on the laminate may be made with wire bonds. The packaging allows more flexible design and tuning of packaged microwave circuitry.
Highly Linear, Highly Efficient Wideband RF Power Amplifier Having Wide Video Bandwidth Capability
A radio frequency power amplifier (RF PA) apparatus includes a first RF PA, a second RF PA, and a controller. The first RF PA is configured to deliver RF power to a load over a first range of RF power levels. The second RF PA is configured to deliver RF power to the load over a second range of RF power levels greater than the first range of RF power levels. The controller controls whether the first RF PA is delivering RF power to the load or the second RF PA is delivering RF power to the load, and is further configured to coordinate and control handoffs between the first and second RF PAs by varying magnitudes of input RF voltages applied to the RF input ports of the first and second RF PAs or by varying magnitudes of input bias voltages applied to the RF input ports of the first and second RF PAs.
Temperature correction circuit and method of operating a power amplifier
A temperature correction circuit and method for maintaining a transistor of a power amplifier in a linear operating region of the transistor. The temperature correction circuit includes a first current source circuit operable to provide a first correction current proportional to an absolute temperature of a semiconductor die including the transistor. The temperature correction circuit also includes a second current source circuit operable to provide a second correction current proportional to a change in temperature of a part of the semiconductor die in which the transistor is located during operation of the transistor. The temperature correction circuit further includes a third current source circuit operable to provide a gain selection current. The temperature correction circuit also includes circuitry for producing a reference current from the first and second correction currents and the gain current. The temperature correction circuit further includes an output for providing the reference current to the transistor.
Devices and methods related to embedded sensors for dynamic error vector magnitude corrections
Devices and methods related to embedded sensors for dynamic error vector magnitude corrections. In some embodiments, a power amplifier (PA) can include a PA die and an amplification stage implemented on the PA die. The amplification stage can include an array of amplification transistors, with the array being configured to receive and amplify a radio-frequency (RF) signal. The PA can further include a sensor implemented on the PA die. The sensor can be positioned relative to the array of amplification transistors to allow sensing of an operating condition representative of at least some of the amplification transistors. The sensor can be substantially isolated from the RF signal.
Power amplifier apparatus
A power amplifier apparatus is provided. The power amplifier apparatus includes a number of multi-stage power amplifiers and a bias circuit configured to generate a number of bias signals (e.g., bias current or bias voltage) to control (e.g., activate or deactivate) the multi-stage power amplifiers. In examples disclosed herein, only one of the multi-stage power amplifiers is activated at a given time. In this regard, the bias circuit can generate the bias signals to collectively activate one of the multi-stage power amplifiers, while deactivating the rest of the multi-stage power amplifiers. As such, it may be possible to control a larger number of power amplifier stages based on a smaller number of bias signals. As a result, it may be possible to eliminate a biasing bump pad(s) from the power amplifier apparatus, thus helping to reduce the footprint and cost of the power amplifier apparatus.
BIAS CIRCUIT AND POWER AMPLIFIER CIRCUIT
A bias circuit for a PA. A first transistor has its drain terminal and its gate terminal connected to a first circuit node and its source terminal connected to a first supply terminal, a first current source connected to the first circuit node, and a first resistor connected between the first and second circuit nodes. A second transistor receives a first component of a differential input signal to the PA at its gate terminal, has its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal, and a third transistor receives a second component of the differential input signal to the PA at its gate terminal, having its drain terminal connected to the second circuit node and its source terminal connected to a second supply terminal. The gates terminals of the second and the third transistors are biased by a first voltage.
POWER AMPLIFIER CIRCUIT
A power amplifier circuit is a Doherty type. A peak amplifier has a first transistor and a second transistor. A first source terminal is connected to a first constant potential line. A first drain terminal and a second source terminal are connected to a first node. A second drain terminal is connected to a second constant potential line having a higher potential than the first constant potential line. A first control terminal is connected to a first bias voltage application circuit, and an input signal is input to the first control terminal via a first alternating current coupling circuit. A second control terminal is connected to a second bias voltage application circuit and is connected to the first node via a second alternating current coupling circuit. The first node is connected to the first constant potential line via a third alternating current coupling circuit.
Amplifying device with bias timing control circuit based on duty cycle
A bias timing control circuit includes a current source, a bias switch circuit, a duty cycle sensing circuit, and a switching control circuit. The bias switch circuit includes a first path switch, connected between an output node of the current source and a bias amplifying circuit, and a second path switch, connected between the output node of the current source and a temperature compensation circuit. The duty cycle sensing circuit is configured to generate a timing control signal based on a duty cycle of a transmission enable signal. The switching control circuit is configured to control a first turn-on time of the first path switch during an initial startup period, and a second turn-on time of the second path switch during a normal driving period subsequent to the initial startup period to adjust a warm-up time of a power amplifying circuit based on the timing control signal.
POWER AMPLIFIER MODULE
A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.
OPEN LOOP PROCESS AND TEMPERATURE INDEPENDENT BIAS CIRCUIT FOR STACKED DEVICE AMPLIFIERS
An open loop process and temperature independent bias circuit for stacked device amplifiers is disclosed herein. In one or more embodiments, a method for biasing a stacked high-voltage signal amplifier with a voltage divider bias module comprises generating, by the voltage divider bias module from a power supply voltage (VDD), a plurality of control voltage biases, which comprise a plurality of voltage references plus an offset voltage term (Vtemp). In one or more embodiments, the plurality of voltage references are each proportional to a division of the power supply voltage (VDD), and the offset voltage term (Vtemp) is proportional to temperature and is a function of process variation. The method further comprises biasing, a plurality of devices of the stacked high-voltage signal amplifier, with the control voltage biases.