An amplifier includes a first stage and a second stage. The first stage includes a first output, and a second output. The second stage includes a first transistor, a second transistor, and a common-mode circuit. The first transistor includes a drain coupled to the first output of the first stage. The second transistor includes a drain coupled to the second output of the first stage. The common-mode circuit includes a reversible current mirror circuit coupled to the drain of the first transistor and the drain of the second transistor.

Circuit techniques for providing base-current cancellation of a bipolar junction transistor (BJT) differential pair that compensate for tail current noise and differential voltage transients without penalizing supply headroom.

In an embodiment, an electronic circuit includes: an input differential pair including first and second transistors; a first pair of transistors in emitter-follower configuration including third and fourth transistors, and an output differential pair including fifth and sixth transistors. The third transistor has a control terminal coupled to the first transistor, and a current path coupled to a first output terminal. The fourth transistor has a control terminal coupled to the second transistor, and a current path coupled to a second output terminal. The fifth transistor has a control terminal coupled to the first transistor, and a first current path terminal coupled to the first output terminal. The sixth transistor has a control terminal coupled to the second transistor, and a first current path terminal coupled to the second output terminal. First and second termination resistors are coupled between the first pair of transistors and the output differential pair.

Optical amplification apparatus (1) for a submarine optical amplifier (90), the optical amplification apparatus (1) comprising an optical amplification system (2), comprising at least one active component (3), and a DC/DC converter (4) connected to supply the optical amplification system (2), wherein the DC/DC converter (4) comprises a first commutator (5) and a pulse modulator (6) connected to the first commutator (5) for cyclically switching with a duty cycle the first commutator (5) between a closing configuration, in which it can be passed thought by a current, and an opening configuration, in which it cannot be passed thought by the current, characterized in that the DC/DC converter (4) comprises a retroaction circuit (7) comprising, a first differential amplifier (8) connected for receiving, at a first input port, a first signal (100) representative of at least a voltage at output from the DC/DC converter (4) and at input into the optical amplification system (2) and, at a second input port, a first reference signal (201), the first differential amplifier (8) being structured for generating a first error signal (101) representative of a difference between the first signal (100) and the first reference signal (201), a second differential amplifier (9) connected to the first differential amplifier (8) for receiving, at a first respective input port, the first error signal (101) and, at a second respective input port, a second reference signal (201), the second differential amplifier (9) being structured for generating a second error signal (102) representative of a difference between the first error signal (101) and the second reference signal (201), wherein the second error signal (102) is proportional to a deviation of the voltage at output from the DC/DC converter (4) with respect to a nominal working voltage of the optical amplification system (2), in that the first input port of the first differential amplifier (8) and the first respective input port of the second differential amplifier (9) are concordant ports, and in that the pulse modulator (6) is connected to the second differential amplifier (9) for receiving the second error signal (102) and for regulating the duty cycle as a function of the second error signal (102).

An operational amplifier 1 comprises transistors Q1 and Q2 forming an input stage, and input resistors R1 and R2 which form a filter together with parasitic capacitors C1 and C2 accompanying the transistors Q1 and Q2. Resistance values R of the resistors R1 and R2 may be set to R=1/(2π.Math.fc.Math.C), where C is the capacitance value of each of the parasitic capacitors C1 and C2, and fc is the target cutoff frequency of the filter. The operational amplifier 1 may also include a power supply resistor R0 which forms a filter together with a parasitic capacitor C0 accompanying a power supply line.

Disclosed herein is a voltage gain amplifier for use in an automotive radar receiver chain. The voltage gain amplifier utilizes pole-zero cancelation to yield a desired transfer function without gain peaking at a bandwidth in which attenuation is desired, and utilizes a low pass filter effectively formed by a feedback loop including a high pass filter and a differential amplifier to ensure the desired level of attenuation at the desired bandwidth. In some instances, a chopper may be utilized in the feedback loop prior to the high pass filter, and after the differential amplifier, so as to reduce the bandwidth of the differential amplifier in the feedback loop.

The radio-frequency differential circuit includes an input balun, an output balun, a first differential amplifying circuit, a second differential amplifying circuit, a first linear feedback circuit and a second linear feedback circuit; the first differential amplifying circuit is arranged between a first output end of the input balun and a first input end of the output balun; the second differential amplifying circuit is arranged between a second output end of the input balun and a second input end of the output balun; a first end of the first linear feedback circuit is connected with the input balun, a second end of the first linear feedback circuit is connected with the first differential amplifying circuit; a first end of the second linear feedback circuit is connected with the input balun, and a second end of the second linear feedback circuit is connected with the second differential amplifying circuit.

According to one aspect, embodiments of the invention provide a distortion detection circuit comprising an input configured to be coupled to an output stage of an amplifier and to receive an RF signal from the output stage of the amplifier, an output configured to be coupled to a module of the amplifier, at least one peak detection circuit coupled to the input and configured to monitor the RF signal and output a first signal based on positive voltage peaks of the RF signal, and a differential amplifier having an input coupled to the at least one peak detection circuit and configured to monitor the first signal and provide a second signal to the output in response to a voltage of the first signal exceeding a threshold level indicative of distortion in the RF signal.

A split-steer amplifier with an invertible phase output, includes a first transistor having its base coupled to a positive node of an input port, its emitter coupled to ground, and collector connected to a positive intermediate node; a second transistor having its base coupled to a negative node of the input port, its emitter coupled to ground, and collector connected to a negative intermediate node; and multiple output ports each having a transistor arrangement operable to couple a positive node of that output port to the positive intermediate node and a negative node of that output port to the negative intermediate node, operable to couple the positive node of that output port to the negative intermediate node and the negative node of that output port to the positive intermediate node, and operable to decouple the positive node and the negative node of that output port from the intermediate nodes.

An analog computing method includes the steps of: (a) generating a biasing current (IWi) using a constant gm bias circuit operating in the subthreshold region for ultra-low power consumption, wherein gm is generated by PMOS or NMOS transistors, the circuit including a switched capacitor resistor; and (b) multiplying the biasing current by an input voltage using a differential amplifier multiplication circuit to generate an analog voltage output (VOi). In one or more embodiments, the method is used in a vision application, where the biasing current represents a weight in a convolution filter and the input voltage represents a pixel voltage of an acquired image.