The present invention discloses a signal output circuit applying bandwidth broadening mechanism for an image signal transmission apparatus that includes a first driving circuit and a second driving circuit. The first driving circuit includes a continuous time linear equalizer (CTLE) and is configured to receive a digital input signal to perform a high frequency enhancement thereon to increase a bandwidth of the digital input signal to generate a first output signal, in which a zero point and two poles of a frequency response of the first driving circuit are determined by circuit parameters thereof. The second driving circuit is configured to receive and amplify the first output signal to generate a second output signal for an image receiving apparatus.

Enhanced operational amplifier trim circuitry and techniques are presented herein. In one implementation, a circuit includes a reference circuit configured to produce a set of reference voltages, and a digital-to-analog conversion (DAC) circuit. The DAC circuit comprises a plurality of transistor pairs, where each pair among the plurality of transistor pairs is configured to provide portions of adjustment currents for an operational amplifier based at least on the set of reference voltages and sizing among transistors of each pair. The circuit also includes drain switching elements coupled to drain terminals of the transistors of each pair and configured to selectively couple one or more of the portions of the adjustment currents to the operational amplifier in accordance with digital trim codes.

A device, a memory interface device, and a method of implementing an active inductor circuit are disclosed. In one aspect, the device includes one or more active inductor circuits, each including a first metal-oxide-semiconductor (MOS) transistor and a second MOS transistor. The first MOS transistor has a first terminal connected to a first voltage level, a second terminal connected to a resistor, and a gate terminal. The second MOS transistor has a first terminal connected to the first voltage level, a second terminal connected to a first current source and the gate terminal of the first MOS transistor, and a gate terminal connected to the resistor and to a capacitor connected to a second voltage level. One of the first MOS transistor and the second MOS transistor is a p-channel MOS (PMOS) transistor, and another of the first MOS transistor and the second MOS transistor is an n-channel MOS (NMOS) transistor.

Universal Serial Bus (USB) repeater circuits and methods of operating the same for communicating data signals from a first pair of data terminals to a second pair of data terminals of the repeater. In a first channel, an amplifier stage in a receiver amplifies a differential signal received at the first pair of data terminals to generate a differential signal at first and second output nodes of the receiver, and a transmitting circuit transmits a differential signal at the second pair of data terminals responsive to the differential signal at the first and second output nodes of the receiver. The receiver includes a hysteresis stage that receives an offset in opposition to the differential signal at the first and second output nodes of the receiver. End-of-packet (EOP) dribble in USB communications in the HS mode is reduced by the offset at the hysteresis stage.

A photoelectric conversion apparatus includes a pixel which includes a photoelectric conversion element; a signal line connected with the pixel; a voltage-current conversion unit configured to convert a voltage signal of the signal line into current; and a conversion unit that includes an oversampling type analog-to-digital conversion circuit that converts the current outputted from the voltage-current conversion unit into digital signals. The voltage-current conversion unit converts the voltage signal of the signal line into the current without sampling and holding and outputs the converted current to the conversion unit.

An amplifier including a P-channel transistor having current terminals coupled between a first node and a second node and having a control terminal coupled to a third node receiving an input voltage, an N-channel transistor having current terminals coupled between a fourth node developing an output voltage and a supply voltage reference and having a control terminal coupled to the second node, a first resistor coupled between the first node and a supply voltage, a second resistor coupled between the first and fourth nodes, and a current sink sinking current from the second node to the supply reference node. The amplifier may be converted to differential form for amplifying a differential input voltage. Current devices may be adjusted for common mode, and may be moved or added to improve headroom or to improve power supply rejection. Chopper circuits may be added to reduce 1/f noise.

A semiconductor integrated circuit has a reception circuit configured to receive a strobe signal of which a logic is intermittently switched in synchronization with a data signal, an output circuit configured to extract a low frequency component including at least a DC component of the strobe signal received by the reception circuit and to output a first signal, and a comparison circuit configured to compare a signal level of the first signal with a threshold level. The reception circuit is configured to change a boost amount of a high frequency component different from the low frequency component of the strobe signal based on a comparison result obtained by the comparison circuit.

A circuit is disclosed, in accordance with some embodiments. The circuit includes a transistor stage, a resistive element, a first tunable capacitive element and a second tunable capacitive element. The transistor stage includes a first input/output terminal and a second input/output terminal. The resistive element is connected to the transistor stage. The first tunable capacitive element is connected in parallel with the resistive element. The second tunable capacitive element is connected to the second input/output terminal of the transistor stage.

A dc coupled amplifier includes a pre-driver, and amplifier and a bias control circuit. The pre-driver is configured to receive one or more input signals and amplify the one or more input signals to create one or more pre-amplified signals. The amplifier has cascode configured transistors configured to receive and amplify the one or more pre-amplified signals to create one or more amplified signals, the amplifier further having an output driver termination element. The bias control circuit is connected between the pre-driver and the amplifier, the bias control circuit receiving at least one bias current from the output driver termination element of the amplifier, wherein the pre-driver, the amplifier and the bias control circuit are all formed on a same die.

A transimpedance amplifier circuit includes an amplifier circuit that converts a current signal into a voltage signal with a gain being varied based on a control signal and a gain control circuit that generates the control signal based on an amplitude of the voltage signal. The gain control circuit includes a detection circuit that generates an amplitude-detection-signal in accordance with the amplitude of the voltage signal, a setting circuit that generates an amplitude-reference-signal, a differential voltage generation circuit that generates a differential-voltage-signal obtained by offsetting a voltage difference between the amplitude-detection-signal and the amplitude-reference-signal based on an amplitude-setting-signal, an operational transconductance amplifier (OTA) that generates a differential-current-signal based on the differential-voltage-signal, and a variable capacitor circuit having a variable capacitance being varied based on the amplitude-setting-signal, and configured to be charged/discharged by the differential-current-signal and output a charging voltage. The control signal is generated based on the charging voltage.