A first amplifier circuit includes differential pair transistors that amplify a difference between input voltages and active load transistors connected to the differential pair transistors. A second amplifier circuit amplifies output voltage of the first amplifier circuit. An offset correction current source is connected in parallel with the active load transistors and adjusts electric current flowing through the differential pair transistors to correct offset voltage. An offset correction switch switches a driving state of the offset correction current source. A transconductance proportional current generation circuit generates transconductance proportional current for compensating for temperature drift of offset correction voltage for correcting the offset voltage. The transconductance proportional current is proportional to trans conductance.

An input receiver includes a first current source circuit, a second current source circuit, a first rail-to-rail amplifier circuit, a first inverter circuit, and a second inverter circuit. The first current source circuit adjusts an operating current flowing through a first node according to a first bias signal. The second current source circuit adjusts a ground current flowing through a second node according to a second bias signal. The first rail-to-rail amplifier circuit and the first inverter circuit are connected in parallel between the first node and the second node. The first rail-to-rail amplifier circuit receives an input signal and compares the input signal with a reference voltage and accordingly outputs an amplified signal. The second inverter circuit is coupled between an operating voltage and a ground voltage. The second inverter circuit generates an output signal according to an inverted signal outputted by the first inverter circuit.

An internal power supply for an amplifier is disclosed. The internal power supply floats according to a common mode voltage at the input to the amplifier and according to an input voltage at an input stage of the amplifier. Powering the input stage of the amplifier using the floating supply allows for the use of low voltage devices even when the range of possible common mode voltages includes high voltages. The use of low voltage devices can correspond to performance improvement for the amplifier and can help reduce the size of the amplifier. The internal supply can accommodate both positive and negative common mode voltages and can be used for current sense amplifiers of any gain.

An amplifier circuit comprises a first unit circuit and a second unit circuit. The first unit circuit may include a first current mirror circuit that includes a first active inductor including a P-channel transistor, and a first input circuit configured to generate a first differential current and a second differential current based on a pair of differential input signals. The second unit circuit may include a second current mirror circuit that includes a second active inductor including a P-channel transistor, and a second input circuit configured to generate a third differential current and a fourth differential current based on the pair of differential input signals.

An amplifier circuit includes a differential input terminal, a first power supplier, an amplifier, and a current redistributor. A differential input terminal includes a first differential pair of a p-type and a second differential pair of an n-type, and receives an input voltage. A first power supplier supplies a bias current to the differential input terminal. An amplifier receives an output current of the first differential pair and an output current of the second differential pair, and applies an amplified current to an output node. A current redistributor receives the output current of the first differential pair and the output current of the second differential pair, and provides a redistribution current to the differential input terminal.

Embodiments of the disclosure are drawn to apparatuses and methods for testing the resistance of through silicon vias (TSVs) which may be used, for example, to couple multiple memory dies of a semiconductor memory device. A force amplifier may selectively provide a known current along a mesh wiring structure and through the TSV to be tested. The force amplifier may be positioned on a vacant area of the memory device, while the mesh wiring structure may be positioned in an area beneath the TSVs of the layers of the device. A chopper instrumentation amplifier may be selectively coupled to the TSV to be tested to amplify a voltage across the TSV generated by the current passing through the TSV. The chopper instrumentation amplifier may be capable of determining small resistance values of the TSV.

A receiver front-end circuit and an operating method thereof are disclosed. The receiver front-end circuit includes a common-mode suppression circuit and a rear-stage circuit. The common-mode suppression circuit is used to receive an external input common-mode voltage signal and perform common-mode noise suppression processing on the external input common-mode voltage signal, and then output an internal input common-mode voltage signal. The rear-stage circuit is coupled to the common-mode suppression circuit and used to receive the internal input common-mode voltage signal. The dynamic swing of the internal input common-mode voltage signal is smaller than the dynamic swing of the external input common-mode voltage signal.

Provided is an imaging apparatus including an imaging unit having a plurality of pixels, the pixels each having: a conversion element converting incident light into photoelectrons; a floating diffusion layer electrically connected to the conversion element and converting the photoelectrons into a voltage signal; a differential amplifier circuit electrically connected to the floating diffusion layer, including an amplifier transistor to which a potential of the floating diffusion layer is input, and amplifying the potential of the floating diffusion layer; a feedback transistor electrically connected to the amplifier transistor and initializing the differential amplifier circuit; a clamp capacitance connected in series between the floating diffusion layer and the amplifier transistor; and a reset transistor connected in parallel between the floating diffusion layer and the clamp capacitance and initializing the potential of the floating diffusion layer.

Provided is an imaging apparatus including an imaging unit having a plurality of pixels, the pixels each having: a conversion element converting incident light into photoelectrons; a floating diffusion layer electrically connected to the conversion element and converting the photoelectrons into a voltage signal; a differential amplifier circuit electrically connected to the floating diffusion layer, including an amplifier transistor to which a potential of the floating diffusion layer is input, and amplifying the potential of the floating diffusion layer; a feedback transistor electrically connected to the amplifier transistor and initializing the differential amplifier circuit; a clamp capacitance connected in series between the floating diffusion layer and the amplifier transistor; and a reset transistor connected in parallel between the floating diffusion layer and the clamp capacitance and initializing the potential of the floating diffusion layer.

Differential switching output stage for audio, power and digital data transmission can cause a common mode error due to asymmetric transition between positive and negative outputs. Systems and methods are provided for common mode error correction. In particular, summing nodes, novel error amps an edge switching can be used for common-mode feedback (CMFB) in differential signaling and other applications.