Patent classifications
H03F3/45242
VOLTAGE INTERPOLATOR
Techniques for interpolating two voltages without loading them and without requiring significant power or additional area are described. The techniques include specific topologies for the buffering amplifiers that offer accuracy by cancelling systematic error sources without relying on high gain, thus simplifying the frequency compensation, and reducing power consumption. This can be achieved by biasing the amplifiers from the load current by an innovative feedback structure, which can remove the need for high impedance nodes inside the amplifiers.
Operational amplifier using single-stage amplifier with slew-rate enhancement and associated method
An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal. The bias voltage input includes a first bias voltage, a second bias voltage, a third bias voltage, and a fourth bias voltage. None of the first bias voltage, the second bias voltage, the third bias voltage, and the fourth bias voltage is directly set by the input signal of the single-stage amplifier.
Voltage interpolator
Techniques for interpolating two voltages without loading them and without requiring significant power or additional area are described. The techniques include specific topologies for the buffering amplifiers that offer accuracy by cancelling systematic error sources without relying on high gain, thus simplifying the frequency compensation, and reducing power consumption. This can be achieved by biasing the amplifiers from the load current by an innovative feedback structure, which can remove the need for high impedance nodes inside the amplifiers.
Operational amplifier using single-stage amplifier with slew-rate enhancement and associated method
An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.
Amplifier circuit
An amplifier circuit includes a circuit path of serially connected complementary type transistors. First and second feedback loops include a loop amplifier, the transistors of the circuit path and a corresponding resistor.
CIRCUIT FOR SAR ADC
The application discloses a circuit, including: a positive-terminal p-type transistor; a negative-terminal p-type transistor; a positive-terminal n-type transistor, wherein the positive-terminal p-type transistor and the positive-terminal n-type transistor are cascoded between a first reference voltage and a second reference voltage; a negative-terminal n-type transistor, wherein the negative-terminal p-type transistor and the negative-terminal n-type transistor are cascoded between the first reference voltage and the second reference voltage; a first positive-terminal capacitor, a top plate of the first positive-terminal capacitor is coupled to a gate of the positive-terminal n-type transistor; a first negative-terminal capacitor, a top plate of the first negative-terminal capacitor is coupled to a gate of the negative-terminal n-type transistor; a first control circuit, arranged to generate a first control signal to bottom plates of the first positive-terminal capacitor and the first negative-terminal capacitor according to the positive-terminal output signal, the negative-terminal output signal and the target common mode voltage.
Gain-boosted class-AB differential residue amplifier in a pipelined Analog-to-Digital Converter (ADC) using switched-capacitor common-mode feedback to eliminate tail current sources
A differential residue amplifier fits between Analog-to-Digital Converter (ADC) stages. Switched-Capacitor Common-Mode Feedback circuits determine voltage shifts. An AC-coupled input network uses switched capacitors to shift upward voltages of the differential inputs to the residue amplifier to apply to an upper pair of p-channel differential transistors with sources connected to the power supply. The AC-coupled input network also shifts downward in voltage the differential inputs to the residue amplifier to apply to a lower pair of n-channel differential transistors with grounded sources. The drains of the p-channel differential transistors connect to differential outputs through p-channel cascode transistors. N-channel cascode transistors connect the drains of the n-channel differential transistors to the differential outputs. The drains of differential transistors can be input to differential amplifiers to drive the gates of the cascode transistors for gain boosting. No tail current is used, allowing for wider output-voltage swings with low supply voltages.
OPERATIONAL AMPLIFIER USING SINGLE-STAGE AMPLIFIER WITH SLEW-RATE ENHANCEMENT AND ASSOCIATED METHOD
An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal. The bias voltage input includes a first bias voltage, a second bias voltage, a third bias voltage, and a fourth bias voltage. None of the first bias voltage, the second bias voltage, the third bias voltage, and the fourth bias voltage is directly set by the input signal of the single-stage amplifier.
Low power amplifier structures and calibrations for the low power amplifier structures
Amplifiers can be found in pipelined ADCs and pipelined-SAR ADCs as inter-stage amplifiers. The amplifiers can in some cases implement and provide gains in high speed track and hold circuits. The amplifier structures can be open-loop amplifiers, and the amplifier structures can be used in MDACs and samplers of high speed ADCs. The amplifiers can be employed without resetting, and with incomplete settling, to maximize their speed and minimize their power consumption. The amplifiers can be calibrated to improve performance.
AMPLIFIER CIRCUIT
An amplifier circuit includes a circuit path of serially connected complementary type transistors. First and second feedback loops include a loop amplifier, the transistors of the circuit path and a corresponding resistor.